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##
## This file is part of the coreboot project.
##
## Copyright (C) 2013 DMP Electronics Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
chip northbridge/dmp/vortex86ex # North Bridge
device domain 0 on
device pci 0.0 on end # Host Bridge
chip southbridge/dmp/vortex86ex # South Bridge
device pci 7.0 on end # ISA Bridge
device pci 8.0 on end # Ethernet
device pci a.0 on end # USB 1.1
device pci a.1 on end # USB 2.0
device pci b.0 on end # USB 1.1
device pci b.1 on end # USB 2.0
device pci c.0 on end # IDE
end
end # pci domain 0
chip cpu/dmp/vortex86ex end # CPU
end
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