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## SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x52, 0}"
device domain 0 on
device ref host_bridge on end
device ref peg10 on end
device ref igd on end
chip southbridge/intel/bd82x6x
register "sata_port_map" = "0x33"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
device ref mei1 on end
device ref mei2 off end
device ref me_ide_r off end
device ref me_kt off end
device ref gbe off end
device ref ehci2 on end
device ref hda on end
device ref pcie_rp1 off end
device ref pcie_rp2 off end
device ref pcie_rp3 off end
device ref pcie_rp4 off end
device ref pcie_rp5 off end
device ref pcie_rp6 off end
device ref pcie_rp7 off end
device ref pcie_rp8 off end
device ref ehci1 on end
device ref pci_bridge off end
device ref lpc on end
device ref sata1 on end # SATA (AHCI)
device ref smbus on end
device ref sata2 off end # SATA (Legacy)
device ref thermal off end
end
end
end
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