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path: root/src/mainboard/amd/serengeti_cheetah/Kconfig
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choice
	prompt "Mainboard model"
	depends on VENDOR_AMD

config BOARD_AMD_SERENGETI_CHEETAH
	bool "SERENGETI_CHEETAH"
	select ARCH_X86
	select CPU_AMD_K8
	select CPU_AMD_SOCKET_F
	select NORTHBRIDGE_AMD_AMDK8
	select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
	select SOUTHBRIDGE_AMD_AMD8111
	select SOUTHBRIDGE_AMD_AMD8131
	select SUPERIO_WINBOND_W83627HF
	select PIRQ_TABLE
	select USE_PRINTK_IN_CAR
	help
	AMD Serengeti Series mainboards
endchoice

config MAINBOARD_DIR
	string
	default amd/serengeti_cheetah
	depends on BOARD_AMD_SERENGETI_CHEETAH

config USE_DCACHE_RAM
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH
	
config DCACHE_RAM_BASE
	hex
	default 0xc8000
	depends on BOARD_AMD_SERENGETI_CHEETAH
	
config DCACHE_RAM_SIZE
	hex
	default 0x08000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config DCACHE_RAM_GLOBAL_VAR_SIZE
	hex
	default 0x01000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config APIC_ID_OFFSET
	int
	default 8
	depends on BOARD_AMD_SERENGETI_CHEETAH

config HAVE_HARD_RESET
	bool
	default y
	depends on BOARD_AMD_SERENGETI_CHEETAH

config IOAPIC
	bool
	default y
	depends on BOARD_AMD_SERENGETI_CHEETAH

config SB_HT_CHAIN_ON_BUS0
	int
	default 2
	depends on BOARD_AMD_SERENGETI_CHEETAH

config LB_CKS_RANGE_END
	int
	default 122
	depends on BOARD_AMD_SERENGETI_CHEETAH

config LB_CKS_LOC
	int
        default 123
	depends on BOARD_AMD_SERENGETI_CHEETAH

config MAINBOARD_PART_NUMBER
	string
	default "Serengeti-Cheetah"
	depends on BOARD_AMD_SERENGETI_CHEETAH

config PCI_64BIT_PREF_MEM
	int
        default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config USE_DCACHE_RAM
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config DCACHE_RAM_BASE
	hex
	default 0xc8000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config DCACHE_RAM_SIZE
	hex
	default 0x08000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config DCACHE_RAM_GLOBAL_VAR_SIZE
	hex
	default 0x01000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config USE_FAILOVER_IMAGE
	int
	default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config HW_MEM_HOLE_SIZEK
	hex
	default 0x100000
	depends on BOARD_AMD_SERENGETI_CHEETAH

config MEM_TRAIN_SEQ
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config HAVE_FAILOVER_BOOT
	int
	default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config USE_FAILOVER_IMAGE
	int
	default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config MAX_CPUS
	int
	default 8
	depends on BOARD_AMD_SERENGETI_CHEETAH

config MAX_PHYSICAL_CPUS
	int
	default 4
	depends on BOARD_AMD_SERENGETI_CHEETAH

config MEM_TRAIN_SEQ
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config AP_CODE_IN_CAR
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config HW_MEM_HOLE_SIZE_AUTO_INC
	int
	default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config HT_CHAIN_END_UNITID_BASE
	int
	default 0x6
	depends on BOARD_AMD_SERENGETI_CHEETAH

config USE_INIT
	int
	default 0
	depends on BOARD_AMD_SERENGETI_CHEETAH

config SERIAL_CPU_INIT
	bool
	default n
	depends on BOARD_AMD_SERENGETI_CHEETAH

config AP_CODE_IN_CAR
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config WAIT_BEFORE_CPUS_INIT
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH

config SB_HT_CHAIN_ON_BUS0
	int
	default 2
	depends on BOARD_AMD_SERENGETI_CHEETAH

config CONSOLE_VGA
	bool
	default y
	depends on BOARD_AMD_SERENGETI_CHEETAH

config PCI_ROM_RUN
	int
	default 1
	depends on BOARD_AMD_SERENGETI_CHEETAH