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config BOARD_AMD_SERENGETI_CHEETAH
bool "Serengeti Cheetah"
select ARCH_X86
select CPU_AMD_K8
select CPU_AMD_SOCKET_F
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_AMD_AMD8111
select SOUTHBRIDGE_AMD_AMD8131
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
help
AMD Serengeti Cheetah mainboard.
config MAINBOARD_DIR
string
default amd/serengeti_cheetah
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_SIZE
hex
default 0x08000
depends on BOARD_AMD_SERENGETI_CHEETAH
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
depends on BOARD_AMD_SERENGETI_CHEETAH
config APIC_ID_OFFSET
hex
default 0x8
depends on BOARD_AMD_SERENGETI_CHEETAH
config HAVE_HARD_RESET
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config IOAPIC
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config SB_HT_CHAIN_ON_BUS0
int
default 2
depends on BOARD_AMD_SERENGETI_CHEETAH
config LB_CKS_RANGE_END
int
default 122
depends on BOARD_AMD_SERENGETI_CHEETAH
config LB_CKS_LOC
int
default 123
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAINBOARD_PART_NUMBER
string
default "Serengeti-Cheetah"
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HAVE_FAILOVER_BOOT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_FAILOVER_IMAGE
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAX_CPUS
int
default 8
depends on BOARD_AMD_SERENGETI_CHEETAH
config MAX_PHYSICAL_CPUS
int
default 4
depends on BOARD_AMD_SERENGETI_CHEETAH
config MEM_TRAIN_SEQ
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_END_UNITID_BASE
hex
default 0x6
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_UNITID_BASE
hex
default 0x1
depends on BOARD_AMD_SERENGETI_CHEETAH
config USE_INIT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config SERIAL_CPU_INIT
bool
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
config AP_CODE_IN_CAR
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config WAIT_BEFORE_CPUS_INIT
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config SB_HT_CHAIN_ON_BUS0
int
default 2
depends on BOARD_AMD_SERENGETI_CHEETAH
config CONSOLE_VGA
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
config PCI_ROM_RUN
bool
default y
depends on BOARD_AMD_SERENGETI_CHEETAH
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