blob: 52ec82792ce1bed9a5cd99698c06260dbb7c443e (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
|
if BOARD_ADVANSUS_A785E_I
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_AMD_SOCKET_ASB2
select DIMM_DDR3
select DIMM_REGISTERED
select QRANK_DIMM_SUPPORT
select NORTHBRIDGE_AMD_AMDFAM10
select SOUTHBRIDGE_AMD_RS780
select SOUTHBRIDGE_AMD_CIMX_SB800
select SUPERIO_WINBOND_W83627HF #COM1, COM2
#select SUPERIO_FINTEK_F81216AD #COM3, COM4
select SB_SUPERIO_HWM
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select LIFT_BSP_APIC_ID
select SERIAL_CPU_INIT
select AMDMCT
select HAVE_MP_TABLE
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_1024
select ENABLE_APIC_EXT_ID
select GFXUMA
select HAVE_DEBUG_CAR
select SET_FIDVID
config MAINBOARD_DIR
string
default advansus/a785e-i
config APIC_ID_OFFSET
hex
default 0x0
config MAINBOARD_PART_NUMBER
string
default "A785E-I"
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
config MAX_CPUS
int
default 8
config MAX_PHYSICAL_CPUS
int
default 1
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
config SB_HT_CHAIN_ON_BUS0
int
default 1
config HT_CHAIN_END_UNITID_BASE
hex
default 0x1
config HT_CHAIN_UNITID_BASE
hex
default 0x0
config IRQ_SLOT_COUNT
int
default 11
config AMD_UCODE_PATCH_FILE
string
default "mc_patch_010000b6.h"
config RAMTOP
hex
default 0x2000000
config HEAP_SIZE
hex
default 0xc0000
config RAMBASE
hex
default 0x200000
config VGA_BIOS_ID
string
default "1002,9712"
endif #BOARD_ADVANSUS_A785E_I
|
