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# SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/x4x # Northbridge
device domain 0 on # PCI domain
chip southbridge/intel/i82801jx # Southbridge
device pci 1c.1 off end # PCIe 2
device pci 1f.0 on # LPC bridge
chip superio/ite/it8720f # Super I/O
device pnp 2e.0 on end # Floppy
device pnp 2e.1 on end # COM 1
device pnp 2e.2 on end # COM 2
device pnp 2e.3 on end # Parallel port
device pnp 2e.7 on # GPIO
io 0x60 = 0x000
io 0x62 = 0xa20
io 0x64 = 0xa30
irq 0xc0 = 0x01 # Simple IO Set 1
irq 0xc1 = 0x0c # Simple IO Set 2
irq 0xc2 = 0x00 # Simple IO Set 3
irq 0xc3 = 0x00 # Simple IO Set 4
irq 0xc4 = 0x20 # Simple IO Set 5
irq 0xc8 = 0x01 # Simple IO Set 1 Output
irq 0xc9 = 0x0c # Simple IO Set 2 Output
irq 0xca = 0x00 # Simple IO Set 3 Output
irq 0xcb = 0x00 # Simple IO Set 4 Output
irq 0xcc = 0x20 # Simple IO Set 5 Output
irq 0xf0 = 0x00
irq 0xf1 = 0x00
irq 0xf2 = 0x00
irq 0xf3 = 0x00
irq 0xf4 = 0x00
irq 0xf5 = 0x00
irq 0xf6 = 0x00
irq 0xf7 = 0x00
irq 0xf8 = 0x12
irq 0xf9 = 0x02
irq 0xfa = 0x13
irq 0xfb = 0x02
#irq 0xfc = 0xef # VID Input
irq 0xfd = 0x00
irq 0xfe = 0x00
end
device pnp 2e.a on end # CIR
end
end
device pci 1f.3 on # SMBus
chip drivers/i2c/ck505 # IDT CV194
register "mask" = "{ 0xff, 0xff, 0xff, 0x00,
0xff, 0x00, 0x00, 0x00,
0x00, 0xff, 0xff, 0xff,
0x00, 0xff }"
register "regs" = "{ 0x57, 0xd9, 0xfe, 0xff,
0xff, 0x00, 0x00, 0x00,
0x00, 0x25, 0x7d, 0x96,
0x00, 0xbf }"
device i2c 69 on end
end
end
end
end
end
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