summaryrefslogtreecommitdiff
path: root/src/cpu/x86/lapic/lapic.c
blob: 8c111e8d71be4267ba9ca69e1847a9d6dd12dce0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>

void setup_lapic(void)
{
	/* this is so interrupts work. This is very limited scope -- 
	 * linux will do better later, we hope ...
	 */
	/* this is the first way we learned to do it. It fails on real SMP 
	 * stuff. So we have to do things differently ... 
	 * see the Intel mp1.4 spec, page A-3
	 */

#if NEED_LAPIC == 1
	/* Only Pentium Pro and later have those MSR stuff */
	msr_t msr;

	printk_info("Setting up local apic...");

	/* Enable the local apic */
	msr = rdmsr(LAPIC_BASE_MSR);
	msr.lo |= LAPIC_BASE_MSR_ENABLE;
	msr.lo &= ~LAPIC_BASE_MSR_ADDR_MASK;
	msr.lo |= LAPIC_DEFAULT_BASE;
	wrmsr(LAPIC_BASE_MSR, msr);

	/*
	 * Set Task Priority to 'accept all'.
	 */
	lapic_write_around(LAPIC_TASKPRI,
		lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);

	/* Put the local apic in virtual wire mode */
	lapic_write_around(LAPIC_SPIV, 
		(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
		| LAPIC_SPIV_ENABLE);
	lapic_write_around(LAPIC_LVT0, 
		(lapic_read_around(LAPIC_LVT0) & 
			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
				LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
				LAPIC_DELIVERY_MODE_MASK))
		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
			LAPIC_DELIVERY_MODE_EXTINT)
		);
	lapic_write_around(LAPIC_LVT1, 
		(lapic_read_around(LAPIC_LVT1) & 
			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
				LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
				LAPIC_DELIVERY_MODE_MASK))
		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
			LAPIC_DELIVERY_MODE_NMI)
		);

	printk_debug(" apic_id: 0x%02x ", lapicid());

#else /* !NEED_LLAPIC */
	/* Only Pentium Pro and later have those MSR stuff */
	msr_t msr;

	printk_info("Disabling local apic...");

	msr = rdmsr(LAPIC_BASE_MSR);
	msr.lo &= ~LAPIC_BASE_MSR_ENABLE;
	wrmsr(LAPIC_BASE_MSR, msr);
#endif /* !NEED_LAPIC */
	printk_info("done.\n");
	post_code(0x9b);
}