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config BOOTBLOCK_OFFSET
hex "Bootblock offset"
default 0x3400
help
This is where the Coreboot bootblock resides. For Exynos5250,
this value is pre-determined by the vendor-provided BL1.
config EXYNOS_ACE_SHA
bool
default n
config SATA_AHCI
bool
default n
config SPL_BUILD
bool
default n
config SYS_TEXT_BASE
hex "Executable code section"
default 0x43e00000
config SYS_SDRAM_BASE
hex "SDRAM base address"
default 0x40000000
#FIXME(dhendrix, reinauer): re-visit this RAMBASE/RAMTOP stuff...
config RAMBASE
hex
default SYS_SDRAM_BASE
# according to stefan, this is RAMBASE + 1M.
config RAMTOP
hex
default 0x40100000
config IRAM_BOTTOM
hex
default 0x02020000
config IRAM_TOP
hex
default 0x02077fff
config SYS_INIT_SP_ADDR
hex
default 0x0204F800
config IRAM_STACK
hex
default SYS_INIT_SP_ADDR
config XIP_ROM_SIZE
hex "ROM stage (BL2) size"
default 0x20000
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