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path: root/util/flashrom/jedec.c
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2009-06-28This copy of flashrom is old and unmaintained. Delete it to avoidPatrick Georgi
confusion, after we had a grace period to get people to move over to the new repository. History stays available for the archaeologists and for ancient checkouts (potentially with local changes). Use "svn diff" to get local changes, and apply it to a newer tree (if you manage to apply it, that is). The new repository is available at: svn://coreboot.org/flashrom/trunk Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06FreeBSD definitions of (read|write)[bwl] collide with our own. Before weCarl-Daniel Hailfinger
attempt trickery, we can simply rename the accessor functions. Patch created with the help of Coccinelle. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-05flashrom: Use helper functions to access flash chips.Carl-Daniel Hailfinger
Right now we perform direct pointer manipulation without any abstraction to read from and write to memory mapped flash chips. That makes it impossible to drive any flasher which does not mmap the whole chip. Using helper functions readb() and writeb() allows a driver for external flash programmers like Paraflasher to replace readb and writeb with calls to its own chip access routines. This patch has the additional advantage of removing lots of unnecessary casts to volatile uint8_t * and now-superfluous parentheses which caused poor readability. I used the semantic patcher Coccinelle to create this patch. The semantic patch follows: @@ expression a; typedef uint8_t; volatile uint8_t *b; @@ - *(b) = (a); + writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + readb(b) @@ type T; T b; @@ ( readb | writeb ) (..., - (T) - (b) + b ) In contrast to a sed script, the semantic patch performs type checking before converting anything. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com> Tested-by: Joe Julian git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-25flashrom: Beautify flash chip ID verbose printout a little, always use %02x.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24flashrom: Increase delay in probe_jedec() after Product ID Entry to 10msPeter Stuge
We should follow data sheet timing, even if chips have been tested to answer faster in the field. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Update comment to match delay change in probe_jedec() r3373Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Increase delay in probe_jedec() to 2ms to reliably detect AT29C020Peter Stuge
Run time is increased a few 100ms but this is needed for reliability. I consider this trivial. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-14Check the JEDEC vendor ID for correct parity. Flash chips which can beCarl-Daniel Hailfinger
detected by JEDEC probe routines all have vendor IDs with correct parity. Use a parity check as additional hint whether a vendor ID makes sense. Note: Device IDs have no parity requirements whatsoever. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-31Add continuation ID support to jedec.cCarl-Daniel Hailfinger
The continuation ID code does not go further than checking for IDs of the type 0x7fXX, but does this for vendor and product ID. The current published JEDEC spec has a list where the largest vendor ID is 7 bytes long, but all leading bytes are 0x7f. The list will grow in the future, and using a 64bit variable will not be enough anymore. Besides that, it seems that the location of the ID byte after the first continuation ID byte is very vendor specific, so we may have to revisit that code some time in the future. (Suggestion for a new encoding: Use a two-byte data type for the ID, the lower byte contains the only non-0x7f byte, the upper byte contains the number of 0x7f bytes used as prefix, which is the bank number minus 1 the vendor ID appears in.) Add support for EON EN29F002AT. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-13Fix ATMEL 29C020 detection with flashrom. The JEDEC probe routine hadCarl-Daniel Hailfinger
a delay of 10 us after entering ID mode and this was insufficient for the 29C020. The data sheet claims we have to wait 10 ms, but tests have shown that 20 us suffice. Allow for variations in chip delays with a factor of 2 safety margin. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17Some cosmetic cleanups in the flashrom code and output.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-12Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC ↵Ronald G. Minnich
day :-) Also minor changes to remove tab-space combinations where possible. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Index: jedec.c =================================================================== --- jedec.c (revision 2847) +++ jedec.c (working copy) @@ -281,7 +281,7 @@ // dumb check if erase was successful. for (i = 0; i < total_size; i++) { if (bios[i] != (uint8_t) 0xff) { - printf("ERASE FAILED\n"); + printf("ERASE FAILED @%d, val %02x\n", i, bios[i]); return -1; } } Index: board_enable.c =================================================================== --- board_enable.c (revision 2847) +++ board_enable.c (working copy) @@ -153,7 +153,8 @@ return 1; } /* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note: - We can't use writecnt directly, but have to use a strange encoding */ + * We can't use writecnt directly, but have to use a strange encoding + */ outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port); do { busy = inb(port) & 0x80; @@ -202,43 +203,39 @@ /* * Helper functions for many Winbond Super I/Os of the W836xx range. */ -#define W836_INDEX 0x2E -#define W836_DATA 0x2F - /* Enter extended functions */ -static void w836xx_ext_enter(void) +static void w836xx_ext_enter(uint16_t port) { - outb(0x87, W836_INDEX); - outb(0x87, W836_INDEX); + outb(0x87, port); + outb(0x87, port); } /* Leave extended functions */ -static void w836xx_ext_leave(void) +static void w836xx_ext_leave(uint16_t port) { - outb(0xAA, W836_INDEX); + outb(0xAA, port); } /* General functions for reading/writing Winbond Super I/Os. */ -static unsigned char wbsio_read(unsigned char index) +static unsigned char wbsio_read(uint16_t index, uint8_t reg) { - outb(index, W836_INDEX); - return inb(W836_DATA); + outb(reg, index); + return inb(index+1); } -static void wbsio_write(unsigned char index, unsigned char data) +static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data) { - outb(index, W836_INDEX); - outb(data, W836_DATA); + outb(reg, index); + outb(data, index+1); } -static void wbsio_mask(unsigned char index, unsigned char data, - unsigned char mask) +static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask) { - unsigned char tmp; + uint8_t tmp; - outb(index, W836_INDEX); - tmp = inb(W836_DATA) & ~mask; - outb(tmp | (data & mask), W836_DATA); + outb(reg, index); + tmp = inb(index+1) & ~mask; + outb(tmp | (data & mask), index+1); } /** @@ -248,37 +245,80 @@ * - Agami Aruma * - IWILL DK8-HTX */ -static int w83627hf_gpio24_raise(const char *name) +static int w83627hf_gpio24_raise(uint16_t index, const char *name) { - w836xx_ext_enter(); + w836xx_ext_enter(index); /* Is this the w83627hf? */ - if (wbsio_read(0x20) != 0x52) { /* SIO device ID register */ + if (wbsio_read(index, 0x20) != 0x52) { /* Super I/O device ID register */ fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n", - name, wbsio_read(0x20)); - w836xx_ext_leave(); + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); return -1; } /* PIN89S: WDTO/GP24 multiplex -> GPIO24 */ - wbsio_mask(0x2B, 0x10, 0x10); + wbsio_mask(index, 0x2B, 0x10, 0x10); - wbsio_write(0x07, 0x08); /* Select logical device 8: GPIO port 2 */ + wbsio_write(index, 0x07, 0x08); /* Select logical device 8: GPIO port 2 */ - wbsio_mask(0x30, 0x01, 0x01); /* Activate logical device. */ + wbsio_mask(index, 0x30, 0x01, 0x01); /* Activate logical device. */ - wbsio_mask(0xF0, 0x00, 0x10); /* GPIO24 -> output */ + wbsio_mask(index, 0xF0, 0x00, 0x10); /* GPIO24 -> output */ - wbsio_mask(0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ + wbsio_mask(index, 0xF2, 0x00, 0x10); /* Clear GPIO24 inversion */ - wbsio_mask(0xF1, 0x10, 0x10); /* Raise GPIO24 */ + wbsio_mask(index, 0xF1, 0x10, 0x10); /* Raise GPIO24 */ - w836xx_ext_leave(); + w836xx_ext_leave(index); return 0; } +static int w83627hf_gpio24_raise_2e(const char *name) +{ + return w83627hf_gpio24_raise(0x2d, name); +} + /** + * Winbond W83627THF: GPIO 4, bit 4 + * + * Suited for: + * - MSI K8N-NEO3 + */ +static int w83627thf_gpio4_4_raise(uint16_t index, const char *name) +{ + w836xx_ext_enter(index); + /* Is this the w83627thf? */ + if (wbsio_read(index, 0x20) != 0x82) { /* Super I/O device ID register */ + fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n", + name, wbsio_read(index, 0x20)); + w836xx_ext_leave(index); + return -1; + } + + /* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */ + + wbsio_write(index, 0x07, 0x09); /* Select logical device 9: GPIO port 4 */ + + wbsio_mask(index, 0x30, 0x02, 0x02); /* Activate logical device. */ + + wbsio_mask(index, 0xF4, 0x00, 0x10); /* GPIO4 bit 4 -> output */ + + wbsio_mask(index, 0xF6, 0x00, 0x10); /* Clear GPIO4 bit 4 inversion */ + + wbsio_mask(index, 0xF5, 0x10, 0x10); /* Raise GPIO4 bit 4 */ + + w836xx_ext_leave(index); + + return 0; +} + +static int w83627thf_gpio4_4_raise_4e(const char *name) +{ + return w83627thf_gpio4_4_raise(0x4E, name); +} +/** * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. * * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there. @@ -335,12 +375,12 @@ pci_write_byte(dev, 0x59, val); /* Raise ROM MEMW# line on Winbond w83697 SuperIO */ - w836xx_ext_enter(); + w836xx_ext_enter(0x2E); - if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */ - wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */ + if (!(wbsio_read(0x2E, 0x24) & 0x02)) /* flash rom enabled? */ + wbsio_mask(0x2E, 0x24, 0x08, 0x08); /* enable MEMW# */ - w836xx_ext_leave(); + w836xx_ext_leave(0x2E); return 0; } @@ -487,9 +527,11 @@ {0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash}, {0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise}, + "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, + {0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, {0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000, - "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise}, + "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, @@ -509,8 +551,8 @@ * Match boards on LinuxBIOS table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, - char *part) +static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, + char *part) { struct board_pciid_enable *board = board_pciid_enables; @@ -525,10 +567,11 @@ continue; if (board->second_vendor && - !pci_dev_find(board->second_vendor, board->second_device)) + !pci_dev_find(board->second_vendor, board->second_device)) continue; return board; } + printf("NOT FOUND %s:%s\n", vendor, part); return NULL; } @@ -545,20 +588,20 @@ continue; if (!pci_card_find(board->first_vendor, board->first_device, - board->first_card_vendor, - board->first_card_device)) + board->first_card_vendor, + board->first_card_device)) continue; if (board->second_vendor) { if (board->second_card_vendor) { if (!pci_card_find(board->second_vendor, - board->second_device, - board->second_card_vendor, - board->second_card_device)) + board->second_device, + board->second_card_vendor, + board->second_card_device)) continue; } else { if (!pci_dev_find(board->second_vendor, - board->second_device)) + board->second_device)) continue; } } @@ -582,7 +625,7 @@ if (board) { printf("Found board \"%s\": Enabling flash write... ", - board->name); + board->name); ret = board->enable(board->name); if (ret) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09Add '(C)' where it's missing (for consistency reasons).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-29Change all flashrom license headers to use our standard format.Uwe Hermann
No changes in content of the files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Cosmetic fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Drop a bunch of useless header files, merge them into flash.h.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23Move code into *.c files, there's no reason to have it in header files.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-23big cosmetic offensive on flashrom. (trivial)Stefan Reinauer
* Give decent names to virt_addr and virt_addr_2 * add some comments * move virtual addresses to the end of the struct, so they dont mess up the initializer. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-09Fix coding style of flashrom by running indent on all files:Uwe Hermann
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch] Some minor fixups were required, and maybe a few more cosmetic changeѕ are needed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-22apply patch from Giampiero Giancipoli <gianci@email.it>:Giampiero Giancipoli
Fixed write_page_write_jedec() in jedec.c. Added a check-reprogram loop in the same function, to come around the high page write failure rate on some boards. This patch includes the changes suggested by Ron to simplify the control flow. It also includes trivial changes by me to make flashrom build on newer systems (libpci needs libz now). I also made a small type case compile fix and proper return code handling in one or two places. Signed-off-by: Giampiero Giancipoli <gianci@email.it> Signed-off-by: Ronald G Minnich <rminnich@gmail.com> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2505 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-23Removing $Id$ tags as they have no meaning in SVNStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-26flasrom update from Stefan, resovle issue 21Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-24rename the directory to match the program nameStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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