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AgeCommit message (Expand)Author
2016-05-06intel/amenia: Declare ChromeEC in devicetree.cbAlexandru Gagniuc
2016-05-06intel/amenia: Check with EC if we should enter recovery modeAlexandru Gagniuc
2016-05-06ec/google/chromeec/ec_commands.h: Include stdint.hAlexandru Gagniuc
2016-05-06intel/amenia: Configure the bridge to ChromeEC in the bootblockAlexandru Gagniuc
2016-05-06soc/apollolake/lpc_lib: Add utility to configure LPC padsAlexandru Gagniuc
2016-05-06soc/apollolake/lpc: Open I/O to LPC based on resource allocationAlexandru Gagniuc
2016-05-06Revert "soc/intel/apollolake: Enable LPC bus interface"Alexandru Gagniuc
2016-05-06intel/amenia: Do not manually open up IO windowsAlexandru Gagniuc
2016-05-06soc/intel/apollolake: fix incorrect bdsm -> tolud memory resourcesAaron Durbin
2016-05-06soc/intel: indicate to build system that XIP_ROM_SIZE isn't usedAaron Durbin
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
2016-05-06{cpu,soc}/intel: remove unused smm_init() functionAaron Durbin
2016-05-06cpu/x86/mp_init: reduce exposure of internal implementationAaron Durbin
2016-05-06soc/intel/skylake: convert to using common MP and SMM initAaron Durbin
2016-05-06cpu/intel/haswell: convert to using common MP and SMM initAaron Durbin
2016-05-06soc/intel/broadwell: convert to using common MP and SMM initAaron Durbin
2016-05-06soc/intel/apollolake: convert to using common MP initAaron Durbin
2016-05-06soc/intel/braswell: convert to using common MP and SMM initAaron Durbin
2016-05-06soc/intel/fsp_broadwell_de: convert to using common MP initAaron Durbin
2016-05-06soc/intel/apollolake: Correct PCI write size in romstageFurquan Shaikh
2016-05-05rdc/r8610: Move to src/socStefan Reinauer
2016-05-05dmp/vortex86ex: Merge northbridge and southbridge into socStefan Reinauer
2016-05-05lib/reg_script: Fix bracesStefan Reinauer
2016-05-05soc/intel/quark: Add script time delay supportLee Leahy
2016-05-05soc/intel/quark: Add temperature sensor supportLee Leahy
2016-05-04soc/intel/quark: Add USB PHY initializationLee Leahy
2016-05-04drivers/xpowers: Switch to src/drivers/[X]/[Y]/ schemeStefan Reinauer
2016-05-04soc/apollolake: Set BootMode based on previous sleep stateRavi Sarawadi
2016-05-04soc/apollolake/romstage: Do not cast const to non-const pointersAlexandru Gagniuc
2016-05-04soc/intel/common/mrc_cache: Honor MRC data as a constant pointerAlexandru Gagniuc
2016-05-04nb/intel/sandybridge/raminit: support calling dram_freq multiple timesPatrick Rudolph
2016-05-04nb/intel/sandybridge/raminit: add additional fallbacksPatrick Rudolph
2016-05-04nb/intel/gm45: Fix native text mode initializationNick High
2016-05-04lib/reg_script: Add display supportLee Leahy
2016-05-04soc/intel/fsp_baytrail: convert to using common MP and SMM initAaron Durbin
2016-05-04soc/intel/baytrail: convert to using common MP and SMM initAaron Durbin
2016-05-04cpu/x86: combine multiprocessor and SMM initializationAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-04broadwell/me: Fix out-of-bounds array access errorEvan Lojewski
2016-05-04cpu/x86/smm_module_loader: always build with SMM module supportAaron Durbin
2016-05-03soc/intel/quark: Add IntelQNCConfig.h from EDK-IILee Leahy
2016-05-03mainboard/intel/galileo: Enable I2C and GPIOLee Leahy
2016-05-03vendorcode/intel/fsp/fsp1_1/quark: Update FspUpdVpd.hLee Leahy
2016-05-03chromeos: Ensure that the last file in FW_MAIN is not also the first onePaul Kocialkowski
2016-05-03intel/baytrail: use fmap information for code cachingPatrick Georgi
2016-05-03lib/cbfs: Use fmap derived information about the COREBOOT regionPatrick Georgi
2016-05-03arch/x86: Drop CBFS_BASE_ADDRESSPatrick Georgi
2016-05-03southbridge/amd: Drop HUDSON_FWM_INSIDE_CBFSPatrick Georgi
2016-05-03build system: remove CBFSTOOL_PRE1_OPTSPatrick Georgi
2016-05-02soc/intel/quark: Remove UPD parametersLee Leahy
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-05-02drivers/intel/fsp1_1: fix linking romstage when SEPARATE_VERSTAGE usedAaron Durbin
2016-05-02arch/x86/assembly_entry: allow early post CAR stages to use common codeAaron Durbin
2016-05-02arch/x86/asembly_entry: reorder conditional stage entry macrosAaron Durbin
2016-05-02lib/coreboot_table: use the architecture dependent table sizeAaron Durbin
2016-05-02arch: introduce architecture dependent common variablesAaron Durbin
2016-05-02nb/amd/mct_ddr3: Only initialize ECC bits onceTimothy Pearson
2016-05-02x86/memlayout.h: Do not include data/bss sections in C_ENVIRONMENT_BOOTBLOCKFurquan Shaikh
2016-05-01mb/emulation/*/board_info.txt: Update QEMU URLJonathan Neuschäfer
2016-05-01nb/amd/mct_ddr3: Warn if MaxRdLatency training fails on Family 15hTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Stop receiver enable cycle training after window foundTimothy Pearson
2016-05-01nb/amd/mct_ddr3: Do not constantly reset read data timing registers to 0Timothy Pearson
2016-05-01nb/amd/mct_ddr3: Skip nibble training when current DIMM is not x4Timothy Pearson
2016-05-01nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15hTimothy Pearson
2016-04-30lib/reg_script: Allow multiple independent handlersLee Leahy
2016-04-30lib/regscript: Add exclusive-or (xor) supportLee Leahy
2016-04-30soc/apollolake: Prevent PMC BAR reassignment during resource allocationHannah Williams
2016-04-29soc/intel/apollolake: clarify Fast SPI CS2 pad configurationAaron Durbin
2016-04-29nb/intel/sandybridge/raminit: fix regression "always use mrccache"Patrick Rudolph
2016-04-29siemens/mc_bdx1: Add new mainboard.Werner Zeh
2016-04-28nb/amd/mct_ddr3: Restart system on training failure instead of using die()Timothy Pearson
2016-04-28Add board URLs for the RISC-V boardsJonathan Neuschäfer
2016-04-28Fix "Spike RISCV" board nameJonathan Neuschäfer
2016-04-28fsp_baytrail: Fix missing "$" when using Kconfig switchWerner Zeh
2016-04-28drivers/intel/i210: Use uint8_t and friends instead of u8Werner Zeh
2016-04-28mc_tcu3: Switch to hwilib instead of own hwinfo implementationWerner Zeh
2016-04-28vendorcode/siemens: Add hwilib for Siemens specific info structWerner Zeh
2016-04-28soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS buildsLance Zhao
2016-04-28soc/intel/apollolake: Add GPIO devicesZhao, Lijian
2016-04-28soc/intel/apollolake: Add cache for BIOS ROMAndrey Petrov
2016-04-28soc/intel/apollolake: Enable LPC bus interfaceAndrey Petrov
2016-04-28soc/intel/apollolake: Enable RAM cache for cbmem region in ramstageAndrey Petrov
2016-04-28soc/intel/apollolake: Fix northbridge _crs scopeZhao, Lijian
2016-04-28mainboard/amenia: Enable Chrome EC Interface/KeyboardDivya Sasidharan
2016-04-28soc/intel/apollolake: Configure a GPIO for TPM in bootblockAndrey Petrov
2016-04-28soc/intel/apollolake: Avoid marking 0xe0000-0xfffff region usableAndrey Petrov
2016-04-28soc/intel/apollolake: Actually include ACPI PCI IRQ definitionsAndrey Petrov
2016-04-26mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stageTimothy Pearson
2016-04-26nb/amd/mct_ddr3: Report correct DIMM in MRS setup routinesTimothy Pearson
2016-04-26nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setupTimothy Pearson
2016-04-25ensure correct byte ordering for cbfs segment listGeorge Trudeau
2016-04-25nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK changeTimothy Pearson
2016-04-22drivers/ricoh: Fully switch to src/drivers/[X]/[Y]/ schemeStefan Reinauer
2016-04-22soc/intel/quark: Fix MTRR readsLee Leahy
2016-04-22soc/intel/quark: Fix uninitialized variable d_variantLee Leahy
2016-04-22Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training"Timothy Pearson
2016-04-22nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency changeTimothy Pearson
2016-04-22nb/amd/mct_ddr3: Fix RDIMM training on certain DIMMsTimothy Pearson
2016-04-22nb/amd/mct_ddr3: Run fence training on each node after memory clock changeTimothy Pearson
2016-04-22soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CARFurquan Shaikh
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