| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-21 | soc/intel/fsp_baytrail: Drop support | Arthur Heymans |
| 2019-11-21 | nb/sb/cpu: Drop Intel Rangeley support | Arthur Heymans |
| 2019-08-21 | intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor | Kyösti Mälkki |
| 2019-01-15 | vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp | Patrick Rudolph |
| 2018-11-19 | northbridge/intel/fsp_*: Remove legacy SoCs | zaolin |
| 2016-05-13 | vendorcode/intel/fsp1_0: Don't break GCC strict aliasing | Stefan Reinauer |
| 2016-03-14 | vendorcode/intel/fsp1_0: Add Broadwell-DE SoC vendor code | York Yang |
| 2016-02-10 | soc/fsp_baytrail: Add support for FSP MR 005 | Ben Gardner |
| 2016-01-29 | src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files | Martin Roth |
| 2015-11-18 | fsp1_0: Update rangeley to revision POSTGOLD4 | Marcin Wojciechowski |
| 2015-07-21 | intel/fsp_baytrail: Support Baytrail FSP Gold4 release | York Yang |
| 2015-07-15 | intel/fsp_baytrail: Remove PcdEnableLan option | York Yang |
| 2015-04-24 | fsp: Move fsp to fsp1_0 | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |