| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-09-01 | {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent | Subrata Banik |
| 2019-12-04 | binaryPI: Fix failing AP startup | Kyösti Mälkki |
| 2019-11-27 | binaryPI: Drop CAR teardown without POSTCAR_STAGE | Kyösti Mälkki |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2019-02-14 | binaryPI: Fix cache coherency use for AP CPUs | Kyösti Mälkki |
| 2018-04-11 | Correct "MTTR" to "MTRR" | Jonathan Neuschäfer |
| 2017-09-26 | AGESA: Implement POSTCAR_STAGE | Kyösti Mälkki |
| 2017-07-15 | vendorcode/amd/pi: Tidy up gcccar.inc | Kyösti Mälkki |
| 2017-07-15 | vendorcode/amd/pi: Clarify CAR disable | Marc Jones |
| 2015-08-07 | vendorcode: Move AMD sources from blobs to vendorcode | Marc Jones |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |