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Change-Id: If5a72786d1119908073488c1d6d8787ac0f4f95c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/23276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: I1b7d7c017a4dfd93c5befbc0d5858278eacc6c89
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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Make DMI data calculation fail-safe to incorrect SPD data.
Change-Id: Ica92850cc77e1f7cbf3e7e44717de42a03b93bbe
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-on: https://review.coreboot.org/20839
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Strip out the AMD internal version tag, e.g.
* @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
which are false/inconsistent and serve no real meaning or purpose now.
Change-Id: I4cca0899eba66a1c361ba784c5ac0222b0ee1aa6
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: https://review.coreboot.org/7516
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Add decorations to specify that empty loop is intended so.
Change-Id: Ia3e40d341eca5e26da3832edc733cf1ccc96c136
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Found-by: Clang
Reviewed-on: http://review.coreboot.org/7688
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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Reduce inconsequential differences between fam15 and
fam15tn to better prepare for possible merger.
Change-Id: I016aa1a4cc45553d51190988d48c8a54cfd85f5a
Signed-off-by: Sara Lelliott <sara@jupitercrash.org>
Reviewed-on: http://review.coreboot.org/7503
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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This change is mostly type casts to eliminate compile time
warnings. These specific changes are mostly cherry-picked from
AMD Family 14 code and, as such, contain artifacts copied over
from F14. For example, there are a number of UINT64 casts that
are commented out rather than removed. This is to maintain
consistency between AGESA versions. Ultimately, this is in
preparation for turning on warnings as errors for AMD Family 15
server parts.
Change-Id: Ic73d0b6ebab18d97015a9dd1130aff4e5e432fb7
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3525
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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AMD AGESA code to support Orochi platform family15 model 00-0fh processores,
AMD C32, G34, and AM3r2 Sockets are supported.
Change-Id: If79392c104ace25f7e01db794fa205f47746bcad
Signed-off-by: Kerry Sheh <kerry.she@amd.com>
Signed-off-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/554
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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