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path: root/src/superio/winbond/w83977tf/chip.h
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2014-05-13superio/*: Remove redundant chip.h headerEdward O'Callaghan
Change-Id: If7141112ea67071ee05c52f455c3b2496aa7e17e Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5622 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-02-06uart8250: Drop includes in superioKyösti Mälkki
Change-Id: If723896cc31da75dbb3a63d5dc959764e96fded1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5139 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-08-22Auto-declare chip_operationsKyösti Mälkki
The name is derived directly from the device path. Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1471 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2011-11-01remove trailing whitespaceStefan Reinauer
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/364 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-04-19Drop baud rate init to an arbitrary baud rate from Super I/O code. ↵Stefan Reinauer
See discussion at http://www.mail-archive.com/coreboot@coreboot.org/msg29394.html config->com1, devicetree.cb cleanup and init_uart8250() removal will follow once this patch is comitted Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Updated to drop com1, com2.... from config structure and devicetree.cb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-10Random Winbond Super I/O cosmetic and coding-style fixes.Uwe Hermann
- Whitespace, coding style, and typo fixes. - Drop unused/obsolete "#config chip.h". - Use u8/u16/etc. everywhere. - Use pnp_read_config()/pnp_write_config() instead of open-coding them. - Use pnp_set_logical_device() instead of open-coding it. - W83627EHG: Fix incorrect enable_hwm_smbus() code comment. - Use ARRAY_SIZE. - w83627hf/superio.c: w83627hf_16_bit_addr_qual(): Bugfix, the code was using 'dev->path.pnp.port >> 8' as config port, which is incorrect in superio.c (which has a "real" device_t struct, in contrast to *_early_serial.c which uses "unsigned" as device_t where 'dev >> 8' is required). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-08Add #include guards to all Super I/O header files (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-28trival. All the changes is about comment and spaces.Zheng Bao
In superio folder. 1. Delete trailing white spaces. 2. Change the // comment to /* */. 3. Add some copyright header. 4. reindent. 5. delete multi blank lines. I tried my best to find them. If anything left, please fix it or tell me. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-16Cosmetic changes: push includes to top of file in chip.h files.Roger Zauner
Signed-off-by: Roger Zauner <roger@eskimo.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11cleanup patch from Uwe Hermann.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-29- Add support _framework_ for the Asus p2b. Richard Smith
- New superIO winbond/w83977tf - Add single memory controller SBbus debug routine into a file private to the i440bx This adds support the start of support for an Asus p2b mainboard. Current limitations are the same as for the Bitworks IMS board. Reads from the SMbus don't work. Moving dump_spd_registers() into its own private copy solves the problem of having to go hack on the version that included in src/sdram to only do one memory controller. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1