coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-06-27	sb/intel/lynxpoint: Use common early SPI code	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-12-14	bootblock: Provide some common prototypes	Kyösti Mälkki
2019-04-23	sb/intel/lynxpoint: Enable LPC/SIO setup in bootblock	Arthur Heymans
2019-04-21	cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-09	cpu/intel: Use the common code to initialize the romstage timestamps	Arthur Heymans
2019-01-07	intel/lynxpoint: Fix spelling	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-07-07	timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS	Aaron Durbin
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-11-05	soutbridge/*/bootblock: Use pci_dev_t over device_t typedef	Edward O'Callaghan
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin