coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-01-15	sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate	Elyes Haouas
2024-01-14	sb/intel: Use boolean for pcie_hotplug_map attribute	Felix Singer
2022-03-25	sb/intel/i82801i/jx/chip.h: Use unsigned ints for bitfields	Arthur Heymans
2020-08-12	sb/intel/i82801jx/sata.c: Drop always-false is_mobile check	Angel Pons
2020-07-22	sb/intel/i82801jx: Drop `docking_supported`	Angel Pons
2020-07-22	sb/intel/i82801jx: Drop `c3_latency`	Angel Pons
2020-06-27	sb/intel/i82801jx: Drop `p_cnt_throttling_supported`	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-12	sb/intel/i82801jx: Add common code for LPC decode	Arthur Heymans
2018-11-01	src: Add missing include <stdint.h>	Elyes HAOUAS
2017-07-25	sb/intel/i82801jx: Route all PIRQ to INT11	Arthur Heymans
2017-07-24	sb/intel/i82801jx: Generate default fadt and madt	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Copy i82801ix	Arthur Heymans