coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-06-27	sb/intel/i82801jx: Use common early SPI code	Angel Pons
2020-06-12	sb/intel/i82801jx: Use PCI bitwise ops	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-12-14	bootblock: Provide some common prototypes	Kyösti Mälkki
2019-11-15	nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-13	sb/intel/i82801jx: Enable upper 128bytes of CMOS	Arthur Heymans
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-14	sb/intel: Use common RCBA MACROs	Peter Lemenkov
2019-01-09	cpu/intel: Use the common code to initialize the romstage timestamps	Arthur Heymans
2017-11-23	sb/intel/i82801jx: Store initial timestamp in bootblock	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Copy i82801ix	Arthur Heymans