coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-15	nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-12	sb/intel/i82801jx: Add common code for LPC decode	Arthur Heymans
2019-07-09	arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class	Kyösti Mälkki
2019-05-07	sb/{ICH7,NM10,PCH}: Use common watchdog_off function	Elyes HAOUAS
2019-04-13	sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB	Patrick Rudolph
2018-12-03	nb/intel/x4x: Use common code for SMM in TSEG	Arthur Heymans
2018-10-22	intel: Use CF9 reset (part 1)	Patrick Rudolph
2017-07-23	sb/intel/i82801jx: Add function to detect s3 resume	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Add correct PCI ids and change names	Arthur Heymans
2017-07-21	sb/intel/i82801jx: Copy i82801ix	Arthur Heymans