| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-07-30 | nb/intel/gm45: Use common code for SMM in TSEG | Arthur Heymans |
| 2017-08-19 | i82801dx/gx/ix/jx: Add low-memory backup for S3 path | Kyösti Mälkki |
| 2016-12-11 | intel/gm45: Use romstage_handoff for S3 | Kyösti Mälkki |
| 2016-12-11 | x86 SMM: Fix use with RELOCATABLE_RAMSTAGE | Kyösti Mälkki |
| 2016-12-10 | intel 82801dx/gx/ix: Commit SMM relocation code to DRAM | Kyösti Mälkki |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2013-06-12 | intel/*/smi.c: Output correct GPIO in ALT_GP_SMI_STS register dump | Konstantin Aladyshev |
| 2013-06-11 | Fix cycle error in intel southbridges to display GPI status | Konstantin Aladyshev |
| 2012-11-27 | intel/i82801ix: new southbridge, ICH9 | Patrick Georgi |
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index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |