index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
southbridge
/
intel
/
i82371eb
/
i82371eb.h
Age
Commit message (
Expand
)
Author
2010-12-07
Get rid of some unneeded function prototypes in romstage.c files.
Uwe Hermann
2010-11-29
Tobias Diedrich wrote:
Tobias Diedrich
2010-11-27
After finding the missing bit poweroff works now.
Tobias Diedrich
2010-10-09
Remove various .c #includes from Intel 440BX/82371EB boards.
Uwe Hermann
2010-09-19
Make ASUS P3B-F RAM init actually work by enabling SPD access.
Uwe Hermann
2010-03-28
drop __ROMCC__ define checks.. __PRE_RAM__ is what the code should be looking...
Stefan Reinauer
2009-11-06
Split the two usages of __ROMCC__:
Myles Watson
2009-10-27
Add few missing prototypes, and remove few unused (thus lonelly) variables.
Maciej Pijanka
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-11-30
Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):
Uwe Hermann
2007-06-03
Intel 82371EB: Some code simplifications (trivial).
Uwe Hermann
2007-05-29
Intel 82371EB: Add IDE init support.
Uwe Hermann
2007-05-27
Init for the Intel 82371EB southbridge: make all ROM/BIOS regions
Uwe Hermann
2007-05-03
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
Uwe Hermann
