coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2015-02-09	Intel FSP platforms: Fix timestamps	Kyösti Mälkki
2015-01-06	southbridge: Drop print_ implementation from non-romcc boards	Stefan Reinauer
2015-01-05	timestamps: Switch from tsc_t to uint64_t	Stefan Reinauer
2014-12-16	CBMEM console: Fix boards with BROKEN_CAR_MIGRATE	Kyösti Mälkki
2014-12-09	spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.	Gabe Black
2014-12-09	spi: Remove the spi_set_speed and spi_cs_is_valid functions.	Gabe Black
2014-12-09	fsp platfoms: add prototype & consolidate main entry-point	Martin Roth
2014-12-02	Replace hlt with halt()	Patrick Georgi
2014-11-28	ACPI: Remove CBMEM TOC from GNVS	Kyösti Mälkki
2014-11-25	intel: Remove IRQ1 from possible PIRQ assignemnt.	Vladimir Serbinenko
2014-11-20	Replace includes of build.h with version.h	Kyösti Mälkki
2014-11-08	fsp_rangeley: Switch to per-device ACPI	Vladimir Serbinenko
2014-10-22	cmos: Rename the CMOS related functions.	Gabe Black
2014-10-16	ACPI: Remove CONFIG_GENERATE_ACPI_TABLES	Vladimir Serbinenko
2014-08-18	southbridge/intel/fsp_rangeley: fix to include irqroute.h twice	Martin Roth
2014-07-30	southbridge/intel: Add fsp_rangeley support	Martin Roth