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path: root/src/southbridge/intel/bd82x6x/lpc.c
AgeCommit message (Expand)Author
2017-09-20southbridge/intel/bd82x6x: refactor rtc failure checkingAaron Durbin
2017-09-14device: acpi_name() should take a const struct deviceAaron Durbin
2017-08-30sb/intel/*: add option to lockdown chipset on normal boot pathBill XIE
2017-07-16southbridge/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-27sb/intel/bd82x6x: Fill in acpi_namePatrick Rudolph
2017-05-01nb/intel/sandybridge/gma: Set up OpRegion in nb codePatrick Rudolph
2016-10-07src/southbridge: Remove whitespace after sizeofElyes HAOUAS
2016-08-31src/southbridge: Code formatingElyes HAOUAS
2016-01-03sb/intel/bd82x6x: Add missing PCIIDs for variants .Vladimir Serbinenko
2015-11-04sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETsNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-16intel/southbridge/bd82x6x: Add option to set SPI VSCC registersNico Huber
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-06-05device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-05-29bd82x6x: Move calling of finalize() on resume to southbridge codeVladimir Serbinenko
2015-05-28Migrate 206ax to SMM_MODULESVladimir Serbinenko
2015-05-28igd.asl rewriteVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-28intel SMI handlers: Refactor GPI SMI/SCI routingKyösti Mälkki
2015-04-20southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipsetDamien Zammit
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-11-23sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko
2014-11-19i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplugVladimir Serbinenko
2014-11-09ibexpeak, bd82x6x: Move to implicit length patchingVladimir Serbinenko
2014-11-08bd82x6x: Move to common FADT.Vladimir Serbinenko
2014-10-22cmos: Rename the CMOS related functions.Gabe Black
2014-10-17bd82x6x: Consolidate common GNVS initVladimir Serbinenko
2014-10-11bd82x6x, ibexpeak, lynxpoint: Declare NVSA before its use.Vladimir Serbinenko
2014-10-10bd82x6x, ibexpeak, lynxpoint: Ensure 0-filling of uninited GNVS vars.Vladimir Serbinenko
2014-09-13southbridge/bd82x6x: Reserve 16 MiB for flash and not 8.Vladimir Serbinenko
2014-09-11Move nehalem/sandy/ivy to per-device acpiVladimir Serbinenko
2014-07-08southbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-06-21intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki
2013-06-03Intel BD82x6x: LPC: Unify I/O APIC setupPaul Menzel
2013-04-16Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID is 2Vladimir Serbinenko
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-07-26Reserve bd82x6x LPC decode ranges in the resource allocatorMarc Jones
2012-07-25ELOG: Log boot-time events found in southbridgeDuncan Laurie
2012-07-25CougarPoint/PantherPoint: Add HM77 device ID to tableKimarie Hoot
2012-07-24Add specific power management init code for PantherPointDuncan Laurie
2012-07-24bd82x6x: Convert all PCI ID lists to new schemeStefan Reinauer
2012-07-24Add support for HM70 and NM70 LPC bridgeStefan Reinauer
2012-05-01Don't disable ACPI in the S3 resume pathDuncan Laurie
2012-05-01add new LPC controller device ID valueVadim Bendebury
2012-04-04Add support for Intel Panther Point PCHStefan Reinauer
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