coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-12-03	src: Remove redundant use of ACPI offset(0)	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-11-04	sb/intel: Move 'smbus.asl' to common place	Elyes HAOUAS
2019-04-23	nb/intel/sandybridge: Drop pch.h from sandybridge.h	Patrick Rudolph
2019-01-07	sb/intel/bd82x6x: Fix typo in GPIO Level	Arthur Heymans
2019-01-03	sb/intel/bd82x6x: Move pcie ACPI code to a common place	Arthur Heymans
2018-06-14	src: Get rid of unneeded whitespace	Elyes HAOUAS
2018-05-29	southbridge/intel/bd82x6x: Remove unused argument from ACPI method	Martin Roth
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-24	sandy/ivy: Include IRQ routes from platform	Kyösti Mälkki
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-23	sandy/ivy/nehalem: Remerge interrupt handling	Vladimir Serbinenko
2014-04-11	intel/*bd82x6x/acpi/pch.asl: Correct name of field unit to GP03	Paul Menzel
2013-03-09	Add Intel Panther Point USB3 initialization	Marc Jones
2012-05-01	Update PCIe Root Port _PRT to handle re-mapped functions	Duncan Laurie
2012-04-04	Add support for Intel Panther Point PCH	Stefan Reinauer