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path: root/src/southbridge/amd
AgeCommit message (Expand)Author
2012-04-02Add sb800 spi support.zbao
2012-03-07Move C labels to start-of-linePatrick Georgi
2012-02-29AMD southbridge: remove sp5100Kyösti Mälkki
2012-02-22amd/sb600: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-20Force SB600 bootblock to use I/O for PCI configDave Frodin
2012-02-20Force SB700 bootblock code to use I/O for PCI config cycles.Dave Frodin
2012-02-20Force SB800 bootblock to use I/O for PCI configDave Frodin
2012-02-20Fixes Fam10/SR5650 cpu not recognized message.Dave Frodin
2012-02-17amd/sb700: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-17amd/sb800: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-17amd/amd8111: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-16SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapperKerry Sheh
2012-02-02CIMX wrapper: remove redudant traversing sb800 and sb900 CIMX dirKerry Sheh
2012-01-08rs780: correct comment in switching_gpp_configurations()Jonathan A. Kollasch
2012-01-05rs780: use bitwise rather than boolean notJonathan A. Kollasch
2012-01-05rs780: power down GPPSB SB lane pads in correct PCIe coreJonathan A. Kollasch
2011-12-21Persimmon audio codec verb patch.Marc Jones
2011-12-06Fix AMD 8132 and 8151 southbridge buildsKyösti Mälkki
2011-12-05RS780: print the vgainfoDenis 'GNUtoo' Carikli
2011-11-01remove trailing whitespaceStefan Reinauer
2011-10-31Fix usb debug dongle supportSven Schnelle
2011-10-30Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.Stefan Reinauer
2011-10-28Get rid of the old romstage-as-bootblock ROM layoutPatrick Georgi
2011-10-28sb600: Implement EHCI workaroundPatrick Georgi
2011-10-27Added smbus block read/write for amd8111Oskar Enoksson
2011-10-23SB800: Hide unused gpp portsKerry Sheh
2011-10-15AMD CPU and chipset fixes for compilation with gcc 4.6Stefan Reinauer
2011-10-14Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6Stefan Reinauer
2011-10-13amd/sb600: Enable COM2 at all times in early setupPatrick Georgi
2011-10-12SB800 RAID: add kconfig option RAID_MISC_ROM_POSITIONKerry Sheh
2011-10-12SB800: Sata Enable bus master and enable ahci for AHCI/RAID modeKerry Sheh
2011-10-12sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODEKerry Sheh
2011-10-11mainboard: complete the sb800 devicetree even device is offKerry Sheh
2011-10-11sb800: Add sata ahci/raid mode kconfig optionKerry Sheh
2011-09-15AMD SB800 early console use fixefdesign98
2011-09-14rs780: hide unused gfx ports and gpp portsKerry Sheh
2011-09-07AMD SB800 southbridge updateKerry She
2011-09-07AMD F14 southbridge updateKerry She
2011-09-04Adjust some code/comment of sb700 sata initWang Qing Pei
2011-07-22Update AMD SR5650 and SB700efdesign98
2011-07-14Move AMD SB800 early clock setup.Scott Duplichan
2011-07-14Set SB800 ROM decode size based on kconfig.Marc Jones
2011-06-29amd southbirdge sb800 wrapper, pci bridge fixKerry She
2011-06-28Addition of Family12/SB900 wrapper codeefdesign98
2011-06-22Rename {CPU|NB|SB}/amd/*_wrapper foldersefdesign98
2011-06-20sb800: move spi prefetch and fast read mode to sb bootblock.Stefan Reinauer
2011-06-19ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nicScott Duplichan
2011-06-09Revert changes to set the sb800 to AHCI mode.Marc Jones
2011-06-07re-indent, so files conform to coding guidelines.Stefan Reinauer
2011-06-01trivial remove blanks at the end of lineKerry She
2011-06-01This patch fix a AMD sb800 wrapper compile warning:Kerry She
2011-05-16cimx_wrapper/sb800: Fix indent in late.c:sb800_enable()Peter Stuge
2011-05-15Update gpp port configuration.Scott Duplichan
2011-05-15Program the I/O APIC ID.Scott Duplichan
2011-05-15Enable AHCI mode and hide IDE controller to reduce boot time.Scott Duplichan
2011-05-15Configure CIMx to use 33 MHz fast mode for SPD read.Scott Duplichan
2011-05-07RS780 DDI Lanes configure support,Kerry She
2011-05-07SB800 CIMX code can share the AGESA V5 lib code,Kerry She
2011-04-21more ifdef -> if fixes.Stefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-20drop dead code from sb800 bootblockStefan Reinauer
2011-04-19Fix some more misuses of ifdef/if definedStefan Reinauer
2011-04-18* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that valueStefan Reinauer
2011-04-12Use TOM2 for highest sysmem setting for northbound memory routing (DMA). This...Marc Jones
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-04-10In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.Stefan Reinauer
2011-03-28Add the SR5650 & SP5100 to the Kconfig and Makefile.incZheng Bao
2011-03-28SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx.Zheng Bao
2011-03-27Add AMD SR56x0 support.Zheng Bao
2011-03-17Fix power_on_after_fail handling on AMD SB600Josef Kellermann
2011-02-26It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T...Rudolf Marek
2011-02-24Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600Josef Kellermann
2011-02-15SERIAL_POST was renamed to CONSOLE_POST a while agoStefan Reinauer
2011-02-14Removed LPC DMA Deadlock workaround...Josef Kellermann
2011-02-14 This code provides southbridge initialization for SB800 south bridges. It is...Frank Vibrans
2011-02-12Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early on...Rudolf Marek
2011-02-10RS690: Provide support for MMCONF.Josef Kellermannseppk
2011-02-03Fix subvendor/subdevice programming on RS690Josef Kellermann
2011-01-28Attached patch fixes the LPC decode ranges of SB700. We enable early only Ser...Rudolf Marek
2011-01-28Fix Bimini buildStefan Reinauer
2011-01-27Trivial. Re-indent the code.Zheng Bao
2011-01-27Set the phy via weak function.Zheng Bao
2011-01-25Set the SB800 SATA PHY correctly.Zheng Bao
2011-01-24Change fadt revision back to 3.Zheng Bao
2011-01-21Now bimini can boot linux to login.Zheng Bao
2011-01-20S3 feanture of SB800. Compiliant with SB700.Zheng Bao
2011-01-20Move some board specific functions to sb800.h.Zheng Bao
2011-01-20This sb800 code is derived from sb700.Zheng Bao
2011-01-18remove the code which is not ready to release.Zheng Bao
2011-01-18remove the code which is not ready to release.Zheng Bao
2011-01-12drop unused filesStefan Reinauer
2011-01-11change a readable way to fix SB800 CIMX "multi-character constant warning".Kerry She
2011-01-01src/southbridge/amd/cimx_wrapper: Run dos2unix on the files.Uwe Hermann
2011-01-01AMD SB800: Drop component prefix from filenames.Uwe Hermann
2011-01-01Add AMD SB800 southbridge support via cimx_wrapper.Kerry She
2010-12-31Add RS785(RS880) support. Just few pci_ids.Zheng Bao
2010-12-30Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge codeNils Jacobs
2010-12-29-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)Nils Jacobs
2010-12-29-Clean up some comments.Nils Jacobs
2010-12-14Set the ROMSIZE as 4MB.Zheng Bao