coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2015-12-16	southbridge/amd/sb600: Update HPET base address with #define	Martin Roth
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2011-10-31	Fix usb debug dongle support	Sven Schnelle
2011-04-18	* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value	Stefan Reinauer
2010-10-05	- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1	Patrick Georgi
2010-04-30	get rid of some more warnings..	Stefan Reinauer
2008-10-21	I/O ports are 16bit, so change 'unsigned long port_base' to 'u16 port_base'.	Uwe Hermann
2008-10-13	Move AMD RS690 and SB600 PCI IDs to pci_ids.h where they should be.	Uwe Hermann
2008-10-03	Ron has been doing really good work over in v3. The problem is that the work ...	Marc Jones
2008-10-02	This is so that people can see it. This is the sb600 for v3. It almost	Ronald G. Minnich
2008-09-22	Patch for AMD SB600 chipset.	Michael Xie