coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-12-04	sb/amd/{agesa,pi}/hudson: add southbridge C bootblock initialization	Michał Żygowski
2019-12-03	AGESA,binaryPI: Remove unused s3_load/save_nvram	Kyösti Mälkki
2019-11-29	sb/amd/{agesa,pi}/hudson: enable support for AMD common ACPIMMIO blocks	Michał Żygowski
2019-08-20	AGESA,binaryPI: Replace use of __PRE_RAM__	Kyösti Mälkki
2019-08-20	AGESA,binaryPI: Fix use of chip.h	Kyösti Mälkki
2018-12-19	southbridge: Remove useless include <device/pci_ids.h>	Elyes HAOUAS
2018-05-20	sb/amd/agesa/hudson: Get rid of device_t	Elyes HAOUAS
2017-09-06	AGESA f15tn f16kb: Fix ACPI S3 resume for FCH	Kyösti Mälkki
2016-09-13	southbridge/amd/agesa/hudson: transition away from device_t	Antonello Dettori
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-20	AGESA: Refactor HUDSON_SATA_MODE	Kyösti Mälkki
2014-11-16	agesa/hudson: Remove stale declaration hudson_setup_sata_phys	Vladimir Serbinenko
2014-06-25	Declare acpi_is_wakeup_early() only once	Kyösti Mälkki
2014-06-11	amd/southbridge/lpc: SPI BAR has fixed size/location	Dave Frodin
2014-04-20	southbridge/hudson: Remove redundant definitions of ACPI IO ports	Alexandru Gagniuc
2014-04-17	southbridge/hudson: Remove unused function set_sm_enable_bits()	Alexandru Gagniuc
2014-04-17	southbridge/hudson: Add support for ACPI enable/disable via SMI	Alexandru Gagniuc
2014-04-16	southbridge/hudson: Use MMIO instead of PIO to access PM space	Alexandru Gagniuc
2013-11-12	AMD Hudson: Move function s3_resume_init_data to southbridge	Zheng Bao
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-01-21	Hudson: Changes to agesa/hudson FADT for ACPI 3.0	Martin Roth
2012-12-12	Fix SPI BAR special case in lpc_set_resources	Martin Roth
2012-07-14	AGESA F15 wrapper for Hudson.	zbao