coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-11-16	src: Remove unneeded include <cbmem.h>	Elyes HAOUAS
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-10-23	src: Remove unneeded whitespace	Elyes HAOUAS
2016-09-20	southbridge/amd: Add space around operators	Elyes HAOUAS
2016-09-13	southbridge/amd/agesa/hudson: transition away from device_t	Antonello Dettori
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-01-10	ACPI: Add acpi_is_wakeup_s3() for romstage	Kyösti Mälkki
2014-12-02	southbridge/amd/agesa/hudson/early_setup.c: Use IS_ENABLED macro	Edward O'Callaghan
2014-07-24	southbridge/amd: Remove trailing whitespace	Elyes HAOUAS
2014-04-20	southbridge/hudson: Remove redundant definitions of ACPI IO ports	Alexandru Gagniuc
2014-01-15	AMD Hudson: show POST codes on a PCI device	Idwer Vollering
2013-09-11	CBMEM: Backup top_of_ram instead of cbmem_toc	Kyösti Mälkki
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-20	Unify use of bool config variables	Stefan Reinauer
2012-07-14	AGESA F15 wrapper for Hudson.	zbao