index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
Age
Commit message (
Expand
)
Author
2018-02-07
amd/stoneyridge: Put stage cache into TSEG
Marshall Dawson
2018-02-07
soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP...
Subrata Banik
2018-02-07
soc/intel/common/block: Fix SATA chipset register definitions anomalies
Subrata Banik
2018-02-07
intel/common/block/cpu: Change post_cpus_init after BS_DEV RESOURCES
Barnali Sarkar
2018-02-07
soc/intel/skylake: Add Kabylake PCH H device ID's
V Sowmya
2018-02-06
soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate
Vadim Bendebury
2018-02-06
soc/intel/appololake: Remove dead MPINIT code selection
Arthur Heymans
2018-02-06
soc/amd/stoneyridge/acpi/sleepstates.asl: Fix guarded code
Richard Spiegel
2018-02-06
soc/intel/cannonlake: Increase heap size
John Zhao
2018-02-06
soc/intel/skylake: Add devicetree variable for PCIe HotPlug
Duncan Laurie
2018-02-06
soc/amd/stoneyridge: Add API to initialize non-early_init i2c buses
Daniel Kurtz
2018-02-06
soc/intel/skylake: Set PsysPmax value
Gaggery Tsai
2018-02-05
soc/amd/stoneyridge/acpi/sb_pci0_fch.asl: Fix instability
Richard Spiegel
2018-02-05
soc/intel/skylake: Set PsysPl3 and Pl4
Shelley Chen
2018-02-05
soc/intel/common/block/pmc: Fix ACPI BAR and PCI_COMMAND in PMC config space
Hannah Williams
2018-02-05
soc/intel/apollolake: Clear RTC failure bit after reading it
Furquan Shaikh
2018-02-02
rockchip/rk3399: Pass coreboot table pointer to ARM TF
Julius Werner
2018-02-02
rockchip: Correct UART reference clock value
Julius Werner
2018-02-02
rockchip/rk3288: Fix includes for <soc/clock.h>
Julius Werner
2018-02-02
rockchip/rk3399: extend delay between saradc power up and start command
Lin Huang
2018-02-01
amd/soc/common: Remove cbmem subregions in heap
Marshall Dawson
2018-01-31
amd/stoneyridge: Move TValid and SmmLock to end of POST
Marshall Dawson
2018-01-31
soc/intel/skylake: Always add PM1_TMR block to FADT
Duncan Laurie
2018-01-31
soc/intel/skylake: Fix common timer frequency
Duncan Laurie
2018-01-31
soc/intel/cannonlake: CannonaLake make use of FVI information
Subrata Banik
2018-01-31
drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver
Subrata Banik
2018-01-30
soc/intel/skylake: Add support for mode-aware DPTF
Furquan Shaikh
2018-01-30
soc/amd/stoneyridge: initialize i2c buses marked as early init
Aaron Durbin
2018-01-30
soc/amd/stoneyridge: fix gpio_acpi_path()
Aaron Durbin
2018-01-30
soc/amd/stoneyridge: use new host controller programming
Aaron Durbin
2018-01-30
soc/amd/stoneyridge: utilize full SPI flash controller fifo
Aaron Durbin
2018-01-30
drivers/spi: support cmd opcode deduction for spi_crop_chunk()
Aaron Durbin
2018-01-29
rockchip/rk3399: Support LONG_WRITE type in MIPI DSI
Lin Huang
2018-01-29
intel: Prepare registers so Windows drivers are happier
Patrick Georgi
2018-01-28
soc/intel/denverton_ns: Rename HARCUVAR macros to DENVERTON
Julien Viard de Galbert
2018-01-28
amd/stoneyridge: Add NV storage to ramtop
Marshall Dawson
2018-01-26
soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and report
Lijian Zhao
2018-01-26
soc/intel/apollolake: select NO_UART_ON_SUPERIO
Ravi Sarawadi
2018-01-26
amd/stoneyridge: Convert BiosRam access to MMIO
Marshall Dawson
2018-01-26
soc/amd/stoneyridge: fix compilation error
Aaron Durbin
2018-01-25
soc/amd/stoneyridge: remove dependence on TSC
Aaron Durbin
2018-01-25
drivers/i2c/designware: reduce API complication for bus config
Aaron Durbin
2018-01-25
soc/amd/stoneyridge: Add I2C devicetree support.
Justin TerAvest
2018-01-25
src/amd/stoneyridge: Add devicetree ACPI names
Justin TerAvest
2018-01-25
src/soc/amd/stoneyridge/Kconfig: Use vbios new location
Richard Spiegel
2018-01-25
soc/intel/skylake: Clean up the skylake PCH H device ID macros
V Sowmya
2018-01-25
soc/intel/cannonlake: enable pch link in bootblock
Caveh Jalali
2018-01-25
soc/intel/skylake: Send correct ddr_type to SMBIOS Table
Barnali Sarkar
2018-01-24
soc/amd/stoneyridge/spi: do not open code existing CAR APIs
Aaron Durbin
2018-01-24
soc/amd/stoneyridge: provide alternate monotonic timer
Aaron Durbin
2018-01-24
soc/intel/cannonlake: Add child CARD device into eMMC/SD controller
Subrata Banik
2018-01-24
soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code
Subrata Banik
2018-01-24
soc/intel/cannonlake: Port eMMC controller W/A from Intel Reference code
Subrata Banik
2018-01-24
drives/i2c/designware: incorporate device_operations support
Aaron Durbin
2018-01-24
drivers/i2c/designware: namespace soc functions
Aaron Durbin
2018-01-23
google/kahlee/BiosCallOuts.c: Remove platform_FchParams_reset
Richard Spiegel
2018-01-23
soc/amd/stoneyridge: Add new function sb_program_gpio()
Richard Spiegel
2018-01-23
soc/amd/stoneyridge/southbridge.c: Create a GPIO programming function
Richard Spiegel
2018-01-23
src/soc/intel/cannonlake: Update C-state latency control limits
Vaibhav Shankar
2018-01-23
mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp
N, Harshapriya
2018-01-23
mainboard/intel/cannonlake_rvp: Add support for SND_MAX98357_DA7219
Lijian Zhao
2018-01-23
soc/intel/cannonlake: Add audio NHLT support
Lijian Zhao
2018-01-22
amd/stoneyridge/include/soc/southbridge.h: Replace SATA magic numbers
Richard Spiegel
2018-01-22
AMD/stoneyridge: Fix SATA reset inconsistency
Richard Spiegel
2018-01-19
amd/stoneyridge: Remove unused S3 NVRAM save/restore
Marshall Dawson
2018-01-19
amd/stoneyridge: Add BIOS RAM R/W functions
Marshall Dawson
2018-01-19
amd/stoneyridge: Move SB index/data pairs to iomap.h
Marshall Dawson
2018-01-19
amd/stoneyridge: Move acpi_get_sleep_type to sb_util
Marshall Dawson
2018-01-19
soc/amd/common: Make agesa_heap_base non-static
Marshall Dawson
2018-01-19
amd/common: Remove GetHeapBase camel case
Marshall Dawson
2018-01-19
amd/common: Define regions in AGESA cbmem
Marshall Dawson
2018-01-19
amd/common/s3: Remove legacy spi.c
Marshall Dawson
2018-01-18
security/tpm: Change TPM naming for different layers.
Philipp Deppenwiese
2018-01-18
security/tpm: Move tpm TSS and TSPI layer to security section
Philipp Deppenwiese
2018-01-17
soc/intel/cannonlake: Reserve PMC IO resources
Subrata Banik
2018-01-17
soc/intel/common: Add option to pass SoC IO resource
Subrata Banik
2018-01-17
soc/intel/apollolake/meminit_util_glk.c: Check for NULL
Ravi Sarawadi
2018-01-17
soc/intel/apollolake: Fix prev_sleep_state on G3 exit
Hannah Williams
2018-01-17
soc/amd/common/block/pi: Fix AGESA heap deallocator
Marc Jones
2018-01-17
soc/intel/cannonlake: Add option to select FSP_CAR
Subrata Banik
2018-01-16
soc/intel/cannonlake: Program DMI PCR settings
Lijian Zhao
2018-01-16
soc/intel/apollolake: Set ACPI_FADT_LOW_PWR_IDLE_S0 for S0ix
Shaunak Saha
2018-01-15
Intel sch board & chip: Remove - using LATE_CBMEM_INIT
Martin Roth
2018-01-15
DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT
Martin Roth
2018-01-13
soc/amd/stoneyridge: Add definition for GENINT_DISABLE
Martin Roth
2018-01-13
soc/amd/stonyridge: Give I2C devices unique _UIDs
Daniel Kurtz
2018-01-13
Revert "soc/amd/common/pi: Fix issue in AGESA heap allocator"
Marc Jones
2018-01-12
soc/intel/common/block: Check for NULL before dereference
Shaunak Saha
2018-01-12
soc/intel/skylake: Override KBL IccMax settings
Gaggery Tsai
2018-01-12
soc/intel/common: Add Intel HDA common block driver
Duncan Laurie
2018-01-12
amd/stoneyridge: Keep SPI flash cacheable during POST
Marshall Dawson
2018-01-12
soc/amd/common/pi: Fix issue in AGESA heap allocator
Marc Jones
2018-01-10
soc/rockchip/rk3399: Ensure full eDP init sequence
Ege Mihmanli
2018-01-10
soc/intel/cannonlake: Add a call to gspi_early_bar_init in bootblock
Furquan Shaikh
2018-01-10
soc/amd/common/block/acpi: Add halt.c
Chris Ching
2018-01-09
soc/intel/cannonlake: Remove redundent CNL CPUID macros
Subrata Banik
2018-01-08
soc/amd/stoneyridge/i2c: fix formatting and global symbol
Aaron Durbin
2018-01-08
soc/intel/cannonlake: Initialize DDI-A lane in Normal mode
Abhay Kumar
2018-01-08
soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS
Arthur Heymans
2018-01-07
soc/amd/common: Only load post-memory AGESA into RAM when split enabled
Daniel Kurtz
[next]