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path: root/src/soc/ucb/riscv
AgeCommit message (Expand)Author
2019-01-17riscv: create Kconfig architecture features for new partsRonald G. Minnich
2019-01-14console: Change BOOTBLOCK_CONSOLE default to `y`Nico Huber
2018-12-05mb/emulation/spike-riscv: Implement mtime_initJonathan Neuschäfer
2018-11-05riscv: add support smp_pause / smp_resumeXiang Wang
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-10soc/sifive/fu540: Makefile: include mtime_init in ramstagePhilipp Hug
2018-09-10riscv: update mtime initializationXiang Wang
2018-07-17riscv: add support for modifying compiler optionsXiang Wang
2017-12-02riscv: Remove config string supportJonathan Neuschäfer
2017-11-07RISC-V boards: Stop using the config stringJonathan Neuschäfer
2016-12-06soc/ucb/riscv: Place CBMEM at top of autodetected RAMJonathan Neuschäfer
2016-08-15soc/ucb/riscv: select BOOTBLOCK_CONSOLEJonathan Neuschäfer
2016-07-15arch/riscv: Move CBMEM into RAMJonathan Neuschäfer
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-29kbuild: automatically include SOCsStefan Reinauer
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: add verstageStefan Reinauer
2014-12-09UCB RISCV: Switch to DYNAMIC_CBMEMKyösti Mälkki
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich