coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-01-24	riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV	Ronald G. Minnich
2019-01-17	riscv: create Kconfig architecture features for new parts	Ronald G. Minnich
2019-01-14	console: Change BOOTBLOCK_CONSOLE default to `y`	Nico Huber
2018-11-05	riscv: add support smp_pause / smp_resume	Xiang Wang
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-07-17	riscv: add support for modifying compiler options	Xiang Wang
2016-08-15	soc/ucb/riscv: select BOOTBLOCK_CONSOLE	Jonathan Neuschäfer
2015-01-27	CBMEM: Always use DYNAMIC_CBMEM	Kyösti Mälkki
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-12-09	UCB RISCV: Switch to DYNAMIC_CBMEM	Kyösti Mälkki
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich