coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-05	soc/sifive: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-12-11	fmap: Make FMAP_CACHE mandatory if it is configured in	Julius Werner
2019-11-14	soc/sifive/fu540: Support booting from SD card	Xiang Wang
2019-08-12	soc/sifive/fu540: add code for spi and map flash to memory spaces	Xiang Wang
2019-08-05	soc/sifive/fu540: Add opensbi support	Patrick Rudolph
2018-12-05	soc/sifive/fu540: Add helper function to get tlclk frequency	Jonathan Neuschäfer
2018-11-05	riscv: add support smp_pause / smp_resume	Xiang Wang
2018-10-30	sifive/fu540: correct cbmem support	Philipp Hug
2018-09-14	soc/sifive/fu540: Initialize SDRAM	Philipp Hug
2018-09-12	soc/sifive/fu540: Initialize PLL and clock	Philipp Hug
2018-09-10	soc/sifive/fu540: Add driver for OTP memory	Philipp Hug
2018-09-10	soc/sifive/fu540: add CLINT support	Xiang Wang
2018-09-02	riscv: separately define stack locations at different stages	Xiang Wang
2018-07-18	sifive/fu540: add empty sdram init and size functions	Philipp Hug
2018-04-26	src/sifive: Add the SiFive Freedom Unleashed 540 SoC	Jonathan Neuschäfer