index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
nvidia
/
tegra124
/
lp0
Age
Commit message (
Expand
)
Author
2018-10-11
tegra124_lp0: make sure to build with compiler.h included
Patrick Georgi
2018-10-08
Move compiler.h to commonlib
Nico Huber
2018-09-14
complier.h: add __always_inline and use it in code base
Aaron Durbin
2018-09-10
complier.h: add __noreturn and use it in code base
Aaron Durbin
2018-05-29
src/soc: Add and update license headers
Martin Roth
2018-05-22
soc/nvidia/tegra(124|210): Add distclean targets
Martin Roth
2017-09-05
nvidia/tegra*: Use xcompile for compiler prefix unless specified
Patrick Georgi
2017-08-02
soc/nvidia/tegra*: force using our headers instead of compiler's/system's
Patrick Georgi
2017-07-13
Rename __attribute__((packed)) --> __packed
Stefan Reinauer
2016-07-31
src/soc: Capitalize CPU, ACPI, RAM and ROM
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-07-24
tegra lp0: fix checkpatch errors
Stefan Reinauer
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-21
arm(64): Manually clean up the mess left by write32() transition
Julius Werner
2015-04-21
arm(64): Globally replace writel(v, a) with write32(a, v)
Julius Werner
2015-04-21
arm(64): Replace write32() and friends with writel()
Julius Werner
2015-02-17
T124: perform ram_repair when CPU rail is powered on in warmboot
Yen Lin
2015-01-09
tegra124: fix and fine tune the warm boot code
Joseph Lo
2014-11-14
tegra124: fix the dangerous VPR write order
Joseph Lo
2014-11-13
tegra124: fix OSC initialization on LP0 resume
Andrew Bresticker
2014-09-22
tegra124/nyan: memory and display updates
Andrew Bresticker