| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-04-08 | tegra124: Change all SoC headers to <soc/headername.h> system | Julius Werner |
| 2015-04-04 | tegra124: use known-good drive for fast-train only | Neil Chen |
| 2015-04-04 | tegra124: add support for full DP link training | Neil Chen |
| 2014-12-19 | nyan*: Add fast link training functions | Jimmy Zhang |
| 2014-12-16 | nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 register | Jimmy Zhang |
| 2014-12-16 | tegra124: Initialize display panel by EDID. | Hung-Te Lin |
| 2014-12-15 | tegra124: set MOT bit for I2C-over-AUX | Ken Chang |
| 2014-12-15 | tegra124: Add tegra_dc_i2c_aux_read to allow reading EDID. | Hung-Te Lin |
| 2014-11-14 | t124: Clean up display init functions | Jimmy Zhang |
| 2014-09-22 | tegra124/nyan: memory and display updates | Andrew Bresticker |
| 2014-09-13 | tegra124/nyan: display, clock, and other updates | Julius Werner |
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index : coreboot.git | |
| my copy of coreboot | User & |
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