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path: root/src/soc/mediatek/mt8195/pll.c
AgeCommit message (Expand)Author
2021-07-07soc/mediatek/mt8195: Enable DCMGarmin Chang
2021-06-10soc/mediatek/mt8195: add power and power control for eDPJitao Shi
2021-05-26soc/mediatek/mt8195: Change fsrc source to ulposcchun-jie.chen
2021-05-13soc/mediatek/mt8195: change vpp_sel default mux for 4k supportNancy.Lin
2021-04-28soc/mediatek/mt8195: Add PLL and clock init supportWeiyi Lu