| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-10-23 | soc/mediatek/mt8192: Turn off L2C SRAM and reconfigure as L2 cache | CK Hu |
| 2020-08-13 | soc/mediatek/mt8192: Add DRAM resource in ramstage | CK Hu |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |