| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-01-19 | soc/mediatek/mt8192: Save dramc shuffle result after calibration | Huayang Duan |
| 2020-12-31 | soc/mediatek/mt8192: Add DDR mode register init | Huayang Duan |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |