| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-02-11 | soc/mediatek/mt8186: Lower SPI NOR speed to 52MHiz | Yu-Ping Wu |
| 2021-11-17 | soc/mediatek/mt8186: Enable DCM | Edward-JW Yang |
| 2021-11-15 | soc/mediatek/mt8186: Enable mmu operation for L2C SRAM and DMA | Rex-BC Chen |
| 2021-11-05 | soc/mediatek/mt8186: Add PLL and clock init support | Chun-Jie Chen |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |