| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-07-11 | mediatek: Share PLL code among similar SOCs | Tristan Shieh |
| 2018-06-07 | mediatek: Refine whitespace and formating changes | Tristan Shieh |
| 2016-03-12 | mediatek/mt8173: pll: raising the CPU core frequency | Yidi Lin |
| 2016-03-12 | mediatek/mt8173: Add EMI driver, DRAM initialization | Peter Kao |
| 2016-01-22 | mediatek/mt8173: pll: Add API for enabling USB 3.0 phy reference clock | Chunfeng Yun |
| 2016-01-22 | mediatek/mt8173: add APLL clock setting | Koro Chen |
| 2016-01-13 | tree: drop last paragraph of GPL copyright header from new files | Martin Roth |
| 2015-12-03 | mediatek/mt8173: Add PLL driver | James Liao |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |