summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-08-13soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitionsSridhar Siricilla
2020-08-12soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddressSridhar Siricilla
2020-08-12soc/intel/common/block/sata: Add common SATA driverSubrata Banik
2020-08-12soc/intel/tigerlake: Add IRQs for LPSS uartPatrick Rudolph
2020-08-11soc/intel/common/block/gspi: Recalculate BAR after resource allocationJes Klinke
2020-08-11xeon_sp/cpx: Enable PCH thermal device via FSPJohnny Lin
2020-08-10soc/intel/apollolake: Rename UART irqsPatrick Rudolph
2020-08-10soc/intel/apollolake: Add irq.hPatrick Rudolph
2020-08-10soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devicesPatrick Rudolph
2020-08-09soc/intel/{icl.tgl,jsl}: Remove SMRAM register programmingAamir Bohra
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-08soc/intel/skylake: Enable CIO depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Enable SA IMGU depending on devicetree configurationFelix Singer
2020-08-08soc/intel/skylake: Add IMGU definitions to pci_devs.hFelix Singer
2020-08-08soc/intel/skylake: Enable SDXC depending on devicetree configurationFelix Singer
2020-08-07soc/intel/skylake: Enable thermal subsystem depending on devicetreeFelix Singer
2020-08-07soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.hFelix Singer
2020-08-07soc/intel/cnl: Set Heci1Disable depending on devicetree configFelix Singer
2020-08-07xeon_sp/cpx: Enable HWP Intel Speed ShiftJohnny Lin
2020-08-07soc/intel/broadwell/iobp: Log success in `pch_iobp_write()`Angel Pons
2020-08-07soc/intel/common: Log CSE FW Status Registers before triggering recoverySridhar Siricilla
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-07src/soc/intel/icelake: Allow option to use USE_INTEL_FSP_MP_INITSubrata Banik
2020-08-06soc/intel/tigerlake: add common routine for DDR initNick Vaccaro
2020-08-06soc/intel/common/block/cpu: Refactor init_cpus functionSubrata Banik
2020-08-05{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out codeAngel Pons
2020-08-05{nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik
2020-08-05src: Use space after 'if', 'for'Elyes HAOUAS
2020-08-05src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resourceSubrata Banik
2020-08-05soc/intel/common: Include Alder Lake device IDsSubrata Banik
2020-08-04soc/intel/skylake: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/intel/broadwell: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDsAngel Pons
2020-08-04soc/intel/baytrail: Factor out `acpi_fill_madt()`Angel Pons
2020-08-03soc/intel/baytrail: Add MRC SMBus workaroundMate Kukri
2020-08-03soc/intel/xeon_sp/cpx: configure STACK_SIZEJonathan Zhang
2020-08-03soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2Jonathan Zhang
2020-08-03src/soc/intel/jasperlake: Update SD card ACPI deviceAamir Bohra
2020-08-03Change all assert(0) to BUG()Julius Werner
2020-08-03soc/intel/tigerlake: Invoke PCIe root port swappingCaveh Jalali
2020-08-02soc/intel/baytrail/northcluster.c: Clean up commentsAngel Pons
2020-08-02soc/intel/baytrail/sata.c: Fix SATA init sequenceAngel Pons
2020-08-02soc/intel/baytrail: Add native refcode replacementMate Kukri
2020-08-02soc/intel/baytrail/northcluster.c: Rename variableAngel Pons
2020-08-02soc/intel/baytrail/northcluster.c: Tidy up long linesAngel Pons
2020-08-02soc/intel/braswell/northcluster.c: Tidy up long linesAngel Pons
2020-08-02soc/intel/braswell/northcluster.c: Rename macroAngel Pons
2020-08-01soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecatedSubrata Banik
2020-07-31soc/intel/cannonlake: Fix DMAR when no iGPU is presentPatrick Rudolph
2020-07-31soc/intel/xeon_sp/cpx: configure DIMM_MAX and DIMM_SPD_SIZEJonathan Zhang
2020-07-30smbios: Fix type 17 for Windows 10Patrick Rudolph
2020-07-29soc/intel/tigerlake: Configure TCSS D3Hot and D3ColdJohn Zhao
2020-07-29soc/intel/skylake: Enable HDA depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable HECI3 depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable eMMC depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable TraceHub depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable SMBus depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable LAN depending on devicetree configurationFelix Singer
2020-07-29soc/intel/skylake: Enable SATA depending on devicetree configurationFelix Singer
2020-07-29soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dBDuncan Laurie
2020-07-29soc/intel/jasperlake: Clean up report_cpu_info() functionUsha P
2020-07-28src: Never set ISA Enable on PCI bridgesAngel Pons
2020-07-28soc/intel/braswell/fadt.c: Use `ACPI_ADDRESS_SPACE_IO` macroAngel Pons
2020-07-28broadwell: Factor out PIRQ routing from devicetreeAngel Pons
2020-07-28soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabledFelix Singer
2020-07-28soc/intel/apollolake: Simplify is-device-enabled checksFelix Singer
2020-07-28soc/intel/jasperlake: Simplify is-device-enabled checksFelix Singer
2020-07-28soc/intel/tigerlake: Simplify is-device-enabled checksFelix Singer
2020-07-28Revert "src: Remove unused include <cpu/x86/smm.h>"Patrick Rudolph
2020-07-27soc/intel/jasperlake: Invoke PCIe root port swappingKarthikeyan Ramasubramanian
2020-07-26soc/intel/tigerlake: Disable CPU PCIe in FSPShaunak Saha
2020-07-26soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platformJohn Zhao
2020-07-26soc/intel/common/basecode: Implement CSE update flowRizwan Qureshi
2020-07-26src/soc/intel: Add include <types.h>Elyes HAOUAS
2020-07-26soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIGMaxim Polyakov
2020-07-26soc/intel/common/hda: Add HDA ID for Jasper Lakeyan.liu
2020-07-26soc/intel/jasperlakelake: Rename pch_init() codeUsha P
2020-07-26src: Update bare access to BOOL CONFIG_ vals to CONFIG()Martin Roth
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-26src: Remove whitespace between 'sizeof' and '('Elyes HAOUAS
2020-07-26{sb,soc}/intel/**/*.c: Use macros for PCI COMMAND bitsAngel Pons
2020-07-26cpu,soc/intel: Drop select SMPKyösti Mälkki
2020-07-26src: Remove unused 'include <cbmem.h>'Elyes HAOUAS
2020-07-26src: Remove extra lines in license headerElyes HAOUAS
2020-07-26skylake boards: Factor out copy-pasted PIRQ routesAngel Pons
2020-07-26src: Remove unused include <cpu/x86/smm.h>Elyes HAOUAS
2020-07-26soc/skylake: Configure SATA options only if SATA is enabledFelix Singer
2020-07-25soc/intel/baytrail/southcluster.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/include/soc/irq.h: Add bracesAngel Pons
2020-07-25soc/intel/baytrail: Simplify pattrs definitionsAngel Pons
2020-07-25soc/intel/baytrail/smm.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/smihandler.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/cpu.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/sd.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/lpss.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/lpe.c: Align with BraswellAngel Pons
2020-07-25soc/intel/{baytrail,braswell}: Drop unneeded `return`Angel Pons
2020-07-25soc/intel/baytrail/iosf.c: Add missing bracesAngel Pons
2020-07-25soc/intel/baytrail/elog.c: Align with BraswellAngel Pons
2020-07-25soc/intel/baytrail/cpu.c: Align with BraswellAngel Pons