| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-03-19 | soc/intel/xeon_sp: Initial support for PCI multi segment groups | Patrick Rudolph |
| 2024-03-14 | soc/intel/xeon_sp: Use common _CRS code generation | Patrick Rudolph |
| 2024-03-09 | soc/intel/xeon_sp: Further share domain creation logics in Xeon-SP | Shuo Liu |
| 2024-03-07 | soc/intel/xeon_sp/spr: Fix IOAT resources | Patrick Rudolph |
| 2024-03-06 | soc/intel/xeon_sp: Add ACPI names | Patrick Rudolph |
| 2024-02-20 | soc/intel/xeon_sp: Add support for is_ioat_iio_stack_res | Shuo Liu |
| 2024-01-29 | device: Add a helper function to add a downstream bus | Arthur Heymans |
| 2024-01-24 | soc/intel/xeon_sp/chip_common: Improve the domain ID | Patrick Rudolph |
| 2024-01-22 | soc/intel/xeon_sp: Fix devicetree walking up | Patrick Rudolph |
| 2024-01-15 | soc/intel/xeon_sp: Redesign resource allocation | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |