| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-07-18 | soc/intel/xeon_sp: Skip empty sockets | Patrick Rudolph |
| 2023-03-19 | soc/intel/xeon_sp/spr: Add Sapphire Rapids ramstage code | Jonathan Zhang |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |