coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-07-04	soc/intel/xeon_sp: Add read CPU PPIN MSR function	Johnny Lin
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-06-07	acpi,soc/intel: Make soc/motherboard_fill_fadt() global	Kyösti Mälkki
2020-06-02	soc/xeon_sp/skx: Define MSR PPIN related registers	Johnny Lin
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-11	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	Michael Niewöhner
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-05-01	xeon_sp, ocp/tiogapass: remove unused FSP-style GPIO defs	Maxim Polyakov
2020-04-28	device: Constify struct device * parameter to write_acpi_tables	Furquan Shaikh
2020-04-06	soc/intel/xeon_sp: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov