coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-01-19	intel/xeon_sp, mb/ocp/deltalake: Rework get_stack_busnos()	Maxim Polyakov
2020-12-28	soc/intel/xeon_sp: Lock down IIO DFX Global registers	Arthur Heymans
2020-12-28	soc/intel/xeon_sp: Lock down DMI3 PCI registers	Arthur Heymans
2020-12-14	soc/intel/xeon_sp: Configure DPR on all stacks	Arthur Heymans
2020-11-24	soc/intel/xeon_sp: Select INTEL_COMMON_BLOCK_TCO	Arthur Heymans
2020-11-20	soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callback	Arthur Heymans
2020-11-17	src: Add missing 'include <console/console.h>'	Elyes HAOUAS
2020-11-16	soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id's	Arthur Heymans
2020-11-04	soc/intel/xeon_sp: Add a smm_region function	Arthur Heymans
2020-10-26	src: Include <arch/io.h> when appropriate	Elyes HAOUAS
2020-10-03	soc/intel/xeon_sp: Clean up pci_devs.h	Marc Jones
2020-09-16	xeon_sp/skx: Reorder pci_devs.h	Marc Jones
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov