coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-02-26	soc/intel/xeon_sp: Drop unused cpu.h header	Arthur Heymans
2023-02-23	soc/intel: Use common codeflow for MP init	Arthur Heymans
2023-02-09	arch/x86/include/cpu: introduce CPU_TABLE_END CPU table terminator	Felix Held
2023-02-08	arch/x86/cpu: introduce and use device_match_mask	Felix Held
2022-11-29	Revert "src/arch/x86: Use core apic id to get cpu_index()"	Arthur Heymans
2022-09-15	soc/intel/xeon_sp: Use "if (!ptr)" in preference to "if (ptr == NULL)"	Elyes Haouas
2022-06-02	soc/intel/common/cpu: Use SoC overrides to set CPU privilege level	Subrata Banik
2022-01-19	soc/intel/common/cpu: Use SoC overrides to get CPU privilege level	Subrata Banik
2021-10-22	cpu/x86/mp_init: move printing of failure message into mp_init_with_smm	Felix Held
2021-10-21	cpu/x86/mp_init: use cb_err as mp_init_with_smm return type	Felix Held
2021-10-13	soc/intel: drop P_BLK support	Michael Niewöhner
2021-02-17	soc/intel/xeon_sp/smmrelocate: Don't run twice on the BSP	Arthur Heymans
2020-12-21	soc/intel/xeon_sp/skx: Properly set up MTRR's	Arthur Heymans
2020-11-24	soc/intel/xeon_sp: Enable SMI handler	Rocky Phagura
2020-10-30	soc/intel/xeon_sp: Move read_msr_ppin() to common util.c	Marc Jones
2020-10-29	soc/intel/xeon_sp: Move function debug macros	Marc Jones
2020-10-23	soc/intel/xeon_sp/skx: Add missing includes	Angel Pons
2020-09-21	src/soc/intel: Drop unneeded empty lines	Elyes HAOUAS
2020-07-04	soc/intel/xeon_sp: Add read CPU PPIN MSR function	Johnny Lin
2020-06-16	sb,soc/intel: Replace smm_southbridge_enable_smi()	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov