| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-10-03 | soc/intel/xeon_sp: Use common ASL code for xeon_sp | Marc Jones |
| 2020-10-03 | soc/intel/xeon_sp/skx: Update uncore IRQ routing ACPI tables | Marc Jones |
| 2020-06-02 | soc/intel/xeon_sp/skx: Let iasl automatically resolve _PRT package size | Arthur Heymans |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
| 2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
| 2020-04-09 | soc/intel: Remove unneeded whitespaces | Elyes HAOUAS |
| 2020-03-26 | soc/intel/xeon_sp: Refactor code to allow for additional CPUs types | Andrey Petrov |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |