Age | Commit message (Expand) | Author |
---|---|---|
2020-11-05 | soc/intel/xeon_sp: Use common cpu/intel romstage entry | Arthur Heymans |
2020-10-08 | soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17 | Johnny Lin |
2020-07-12 | soc/intel/xeon_sp: Add RTC failure checking | Jingle Hsu |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
2020-04-24 | soc/intel/xeon_sp/cpx: Allow motherboards to set FSP-M parameters | Andrey Petrov |
2020-03-26 | soc/intel/xeon_sp: Refactor code to allow for additional CPUs types | Andrey Petrov |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2020-03-06 | soc/intel: Add Intel Xeon Scalable Processor support | Jonathan Zhang |