coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-02-25	cpu,mb,nb,soc: use HPET_BASE_ADDRESS instead of magic number	Felix Held
2021-05-10	src: Drop "This file is part of the coreboot project" lines	Angel Pons
2021-02-26	intel/xeon_sp: Add ACPI to control GPIO	Maxim Polyakov
2020-12-10	soc/intel/xeon_sp/nvs: Use common global NVS	Marc Jones
2020-11-04	soc/intel/xeon_sp: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-11-03	soc/intel/xeon_sp/acpi: Fix uncore dsdt for multiple cpus	Marc Jones
2020-10-26	soc/intel/xeon_sp/acpi: Add pch.asl	Marc Jones
2020-10-06	soc/intel/xeon_sp/acpi: Break out the ACPI PCH IRQ ASL	Marc Jones
2020-10-06	soc/intel/xeon_sp/acpi: Move ACPI macros to a header file	Marc Jones
2020-10-06	soc/intel/xeon_sp/acpi: Remove ASL Package() NumElements	Marc Jones
2020-10-03	soc/intel/xeon_sp/acpi: Rename pci_irq.asl	Marc Jones
2020-10-03	soc/intel/xeon_sp: Use common ASL code for xeon_sp	Marc Jones
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2020-03-06	soc/intel: Add Intel Xeon Scalable Processor support	Jonathan Zhang