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path: root/src/soc/intel/tigerlake/bootblock
AgeCommit message (Expand)Author
2022-11-04soc/intel: Include <cpu/cpu.h> instead of <arch/cpu.h>Elyes Haouas
2022-10-25soc/intel/tigerlake: Clean up includesElyes Haouas
2022-04-20soc/intel: clean up dmi driver codeWonkyu Kim
2022-03-07src: Make PCI ID define names shorterFelix Singer
2021-10-01soc/tigerlake: Make IO decode / enable register configurableSean Rhodes
2021-08-24soc/intel/tgl: Add PCR_PSF3_T0_SHDW_PMC_REG_BASE for PCH-HJeremy Soller
2021-08-24soc/intel: Add TGL-H CPUIDJeremy Soller
2021-08-19soc/intel/common: Add TGL-H PCI IDsJeremy Soller
2021-08-04Move post_codes.h to commonlib/console/Ricardo Quesada
2021-07-17soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-01-31soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner
2021-01-25soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner
2020-12-09soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik
2020-11-29soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh
2020-08-26soc/intel/tigerlake: Rename pch_init() codeAlexey Buyanov
2020-08-07soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik
2020-08-05{nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik
2020-07-25soc/intel/tigerlake: Update Tiger Lake SA IDsDerek Huang
2020-07-12soc/intel/tigerlake: Move tco_configure to bootblockTim Wawrzynczak
2020-07-12soc/intel/tigerlake: Add new IGD deviceRavi Sarawadi
2020-07-04soc/intel/tigerlake: Remove unused EHL DID from TGL SoCSubrata Banik
2020-06-06soc/intel/tigerlake: Add CPU ID for TGL B0Jamie Ryu
2020-06-03soc/tigerlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-06-02{icelake,jasperlake,skylake,tigerlake}/bootblock.c: Clean up includesElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-06soc/intel/tigerlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-02-25soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath
2020-02-17soc/tigerlake: Add Device id for Tiger Lake Dual CoreSrinidhi N Kaushik
2020-02-17soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn
2020-02-17soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn
2020-02-15soc/intel/tigerlake: Update PMC Register Base and platform check for JSPUsha P
2020-01-22soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng
2020-01-08soc/intel/tigerlake: Fix PMC configRavi Sarawadi
2019-12-19soc/intel/tigerlake: Add required header files in pch.cAamir Bohra
2019-12-16soc/intel/tigerlake: Pick correct pmc base reg from pch typeMaulik V Vaghela
2019-12-10soc/intel/common: Add Jasperlake Device IDsrkanabar
2019-11-15soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()Subrata Banik
2019-11-14soc/intel/tigerlake: Include few more Tigerlake device IDsSubrata Banik
2019-11-09soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblockSubrata Banik