coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-04-20	soc/intel/tigerlake: Replace SOC_INTEL_TIGERLAKE_S3 with D3COLD_SUPPORT	Sean Rhodes
2023-04-12	Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"	Michael Niewöhner
2023-03-01	soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol	Sean Rhodes
2023-02-09	Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT"	Felix Singer
2023-02-08	device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT	Sean Rhodes
2023-02-08	soc/intel/{tgl,adl}/acpi: Unify the way D3Cold is enabled	Sean Rhodes
2022-12-10	soc/intel/tigerlake: Move TCSS FW latency macros to tcss.h	Subrata Banik
2022-06-22	soc/intel/tigerlake: Replace spaces with tabs	Sean Rhodes
2021-11-15	soc/intel/tigerlake: Add config option for S3 ACPI	Sean Rhodes
2021-10-11	soc/intel/tigerlake: Add ACPI addition for USB4/TBT latency optimization	John Zhao
2021-05-27	soc/intel/tigerlake: Return TBT PowerResource from PR0 and PR3	John Zhao
2021-02-23	soc/intel/tigerlake: Remove polling for Link Active Status at resume	John Zhao
2021-02-04	soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0	John Zhao
2020-10-14	soc/intel/tigerlake: Enable and use USB4 PCIe driver	Duncan Laurie
2020-10-05	soc/intel/tigerlake: Update TCSS PM flow	John Zhao
2020-07-26	src: Remove extra lines in license header	Elyes HAOUAS
2020-06-19	soc/intel/tigerlake: Update TCSS for SW CM support	John Zhao
2020-05-18	soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method	John Zhao
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-22	soc/intel/tigerlake: Configure TCSS power management	John Zhao