| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-02-04 | soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 | John Zhao |
| 2020-10-14 | soc/intel/tigerlake: Enable and use USB4 PCIe driver | Duncan Laurie |
| 2020-10-05 | soc/intel/tigerlake: Update TCSS PM flow | John Zhao |
| 2020-07-26 | src: Remove extra lines in license header | Elyes HAOUAS |
| 2020-06-19 | soc/intel/tigerlake: Update TCSS for SW CM support | John Zhao |
| 2020-05-18 | soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method | John Zhao |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-04-22 | soc/intel/tigerlake: Configure TCSS power management | John Zhao |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |